參數(shù)資料
型號： IDT72T6360L6BB
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 21/51頁
文件大?。?/td> 0K
描述： IC FLOW-CTRL 36BIT 6NS 324-BGA
標(biāo)準(zhǔn)包裝： 1
類型： 連續(xù)流量控制
安裝類型： 表面貼裝
封裝/外殼： 324-BGA
供應(yīng)商設(shè)備封裝： 324-PBGA（19x19）
包裝： 托盤
其它名稱： 72T6360L6BB
28
IDT72T6360 2.5V, SEQUENTIAL FLOW-CONTROL DEVICE
x9, x18, x36 BIT WIDE CONFIGURATION
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
FEBRUARY 10, 2009
DC ELECTRICAL CHARACTERISTICS
(Commercial: VCC = 2.5V ± 0.125V, TA = 0
°C to +70°C;Industrial: VCC = 2.5V ± 0.125V, TA = -40°C to +85°C)
General DC Test Conditions
Measurements taken with VCC = 2.625V,
OE = HIGH, WCLK = RCLK = 16.7MHz, MCLK = 33.3MHz
Data toggles alternately at 1/2 WCLK and RCLK frequency
0.4 < VIN < VCC, 0.4 < VOUT < VCC
Outputs are unloaded (IOUT = 0)
NOTES
:
1. These parameters are compliant under JEDEC standard for SSTL_2 (JESD8-9A). These parameters are classified as SSTL_2 Class I output buffers under section 3.2.1 of
JESD8-9A.
2. ICC (active current) is measured with MCLK = 33.3MHz, RCLK = WCLK = 16.7MHz, and alternate 101010 data pattern toggling on the outputs.
3. ISB (standby current) is measured with MCLK = RCLK = WCLK = 0MHz with no output data toggling.
4. VSDREF is the VREF of the DDR SDRAM. It is not to be confused with the VREF of the SFC.
5. The maximum value may not represent the maximum current dissipated from the SFC. ICC values are dependent upon various factors that include: VCC, temperature,
capacitive load, frequency, bus-width, and output switching characteristics. For calculating ICC with specific parameters, please contact IDT technical support for
assistance.
Symbol
Parameter
Min.
Max.
Unit
ICC1(2)
Active VCC current
—
650
mA
ICC2(2)
Active AVCC current
—
18
mA
ICC3(2)
Active VDDQ current
—
1
mA
ISB1(3)
Standby VCC current
—
600
mA
ISB2(3)
Standby VDDQ current
—
1
mA
POWER CONSUMPTION
I/O Type
Symbol
Parameter
Min.
Max.
Unit
SFC Input
ILI
Inputleakagecurrent
-10
10
A
(LVTTL)
VIH
Input High Voltage
VDDQ = 3.3V
2.0
5.5
V
VDDQ = 2.5V
1.7
3.45
V
VIL
Input Low Voltage
VDDQ = 3.3V
—
0.8
V
VDDQ = 2.5V
-0.3
0.7
V
SFC Output
ILO
Outputleakagecurrent
-10
10
A
(LVTTL)
VOH
Read/Write interface output logic “1” voltage with IOH1
VDDQ = 3.3V
VDDQ – 0.4
—
V
VDDQ = 2.5V
VDDQ – 0.4
—
V
VOL
Read/Write interface output logic “0” voltage with IOL1
VDDQ = 3.3V
—
0.4
V
VDDQ = 2.5V
—
0.4
V
IOH
Read/Writeinterfaceoutputhighcurrent(sourcecurrent)
VDDQ = 3.3V
-2
—
mA
VDDQ = 2.5V
-8
—
mA
IOL
Read/Write interface output low current (sink current)
VDDQ = 3.3V
8
—
mA
VDDQ = 2.5V
8
—
mA
DDR SDRAM
IOH
Memory interface output high current (source current)
-7.6
—
mA
I/O (SSTL_2)(1)
IOL
Memory interface output low current (sink current)
7.6
—
mA
VIH
Memory Interface Input High Voltage
1.7
3.0
V
VIL
Memory Interface Input Low Voltage
-0.3
0.7
V
VOH
Memory Interface Output High Voltage
1.5
—
V
VOL
Memory Interface Output Low Voltage
—
1.00
V
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