參數(shù)資料
型號: IDT72T6360L6BB
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 11/51頁
文件大?。?/td> 0K
描述: IC FLOW-CTRL 36BIT 6NS 324-BGA
標(biāo)準(zhǔn)包裝: 1
類型: 連續(xù)流量控制
安裝類型: 表面貼裝
封裝/外殼: 324-BGA
供應(yīng)商設(shè)備封裝: 324-PBGA(19x19)
包裝: 托盤
其它名稱: 72T6360L6BB
19
IDT72T6360 2.5V, SEQUENTIAL FLOW-CONTROL DEVICE
x9, x18, x36 BIT WIDE CONFIGURATION
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
FEBRUARY 10, 2009
TABLE 6 – IDT72T6360 MAXIMUM FREQUENCY
BASED ON 166MHz DDR SDRAM
MAXIMUM I/O OPERATING FREQUENCY
The sequential flow-control (SFC) device is designed to operate at the
maximumfrequencyof133MHz.Therearecertainconfigurationshowever,that
canincreaseordecreasethemaximumfrequencyoftheinputandoutputports.
In some configurations (e.g. x24 I/O width), the I/O speeds can run up to
166MHz. The main factors that determine the usable memory are the I/O bus-
width of the SFC, the density and number of DDR SDRAMs connected, and
whether or not EDC is used. Tables 6 and 7 lists the maximum frequency for
the input and output ports of the SFC based on the various configurations.
Bus-Width x36
Bus-Width x18
Bus-Width x9
EDC On
EDC Off
EDC On
EDC Off
EDC On
EDC Off
Configuration 1
66MHz
83MHz
133MHz
166MHz
Configuration 2
33MHz
50MHz
83MHz
166MHz
Configuration 3
133MHz
166MHz
Configuration 4
83MHz
100MHz
166MHz
Configuration 5
66MHz
83MHz
133MHz
166MHz
Configuration 6
83MHz
100MHz
166MHz
Configuration 7
133MHz
166MHz
TABLE 7 – IDT72T6360 MAXIMUM FREQUENCY
BASED ON 133MHz DDR SDRAM
Bus-Width x36
Bus-Width x18
Bus-Width x9
EDC On
EDC Off
EDC On
EDC Off
EDC On
EDC Off
Configuration 1
50MHz
66MHz
100MHz
133MHz
166MHz
Configuration 2
33MHz
66MHz
83MHz
133MHz
166MHz
Configuration 3
100MHz
133MHz
166MHz
Configuration 4
66MHz
83MHz
133MHz
166MHz
Configuration 5
50MHz
66MHz
100MHz
133MHz
166MHz
Configuration 6
66MHz
83MHz
133MHz
166MHz
Configuration 7
100MHz
133MHz
166MHz
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