HTG2190
Rev. 1.00
23
June 29, 2001
Oscillator configuration
There are two oscillator circuit in the
HTG2190.
The RC oscillator signal provides the internal
system clock. The HALT mode stops the system
oscillator and ignores any external signal to
conserve power. Only the RC oscillator is de-
signed to drive the internal system clock. The
RTC oscillator provides the timer3 and LCD
driver clock source.
The RC oscillator needs an external resistor
connected between OSCI and V
SS
. The resis-
tance value must range from 50k ~400k
However, the frequency of the oscillator may
vary with V
DD
, temperature and the chip itself
due to process variations. It is, therefore, not
suitable for timing sensitive operations where
accurate oscillator frequency is desired.
The RTC oscillator is used to provide clock
source for LCD driver and Timer3. It can be en-
abled or disabled by mask option.
There is another oscillator circuit designed for
the real time clock. In this case, only the
32768Hz crystal oscillator can be applied. The
crystal should be connected between XIN and
XOUT, and two external capacitors along with
one external resistor are required for the oscil-
lator circuit in order to get a stable frequency.
The WDT oscillator is a free running on-chip
RC oscillator, requiring no external compo-
nents. Even if the system enters the power
down mode, and the system clock is stopped,
the WDT oscillator still runs with a period of
approximately78 s.TheWDToscillatorcanbe
disabled by mask option to conserve power.
Watchdog Timer
WDT
The WDT clock source is implemented by a ded-
icated RC oscillator (WDT oscillator) or instruc-
tion clock (system clock divided by 4), decided
by mask options. This timer is designed to pre-
vent a software malfunction or sequence jump-
ing to an unknown location with unpredictable
results. The Watchdog Timer can be disabled
by a mask option. If the Watchdog Timer is dis-
abled, all the executions related to the WDT re-
sult in no operation.
Once the internal WDT oscillator (RC oscillator
with a nominal period of 78 s) is selected, it is
first divided by 256 (8-stages) to get the nomi-
nal time-out period of approximately 20 ms.
This time-out period may vary with tempera-
ture, VDD and process variations. By invoking
the WDT prescaler, longer time-out periods can
be realized. Writing data to WS2, WS1, WS0
(bit 2,1,0 of the WDTS) can give different
time-out periods. If WS2, WS1, WS0 all equal to
1, the division ratio is up to 1:128, and the max-
imum time-out period is 2.6 seconds.
&- -
4 . 1 + 3 : ;
&
System and RTC oscillator
3 8 0
,
& -
1 8 0
3 8 8 &
,
& 8
, 2 , .
,
Watchdog Timer