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參數(shù)資料
| 型號： | HTG2190 |
| 廠商： | Holtek Semiconductor Inc. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit 1024 Pixel LCD Microcontroller |
| 中文描述： | 8位單片機1024像素LCD |
| 文件頁數(shù)： | 10/64頁 |
| 文件大?。?/td> | 417K |
| 代理商： | HTG2190 |
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HTG2190
Rev. 1.00
10
June 29, 2001
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Execution flow
Functional Description
Execution flow
The system clock for the HTG2190 is derived
from either a crystal or an RC oscillator. It is
internally divided into four non-overlapping
clocks. One instruction cycle consists of four
system clock cycles.
Instruction fetching and execution are
pipelined in such a way that a fetch takes one
instruction cycle while decoding and execution
takes the next instruction cycle. However, the
pipelining scheme causes each instruction to ef-
fectively execute within one cycle. If an instruc-
tion changes the program counter, two cycles
are required to complete the instruction.
Program counter
PC
The 13-bit program counter (PC) controls the
sequence in which the instructions stored in
program ROM are executed.
After accessing a program memory word to
fetch an instruction code, the contents of the
program counter are incremented by one. The
program counter then points to the memory
word containing the next instruction code.
When executing a jump instruction, conditional
skip execution, loading PCL register, subrou-
tine call, initial reset, internal interrupt, exter-
nal interrupt or return from subroutine, the PC
manipulates the program transfer by loading
the address corresponding to each instruction.
The conditional skip is activated by instruction.
Once the condition is met, the next instruction,
fetched during the current instruction execu-
tion, is discarded and a dummy cycle takes its
placewhilethecorrectinstructionisobtained.
The lower byte of the program counter (PCL) is
a read/write register (06H). Moving data into
the PCL performs a short jump. The destina-
tion must be within 256 locations.
When a control transfer takes place, an addi-
tional dummy cycle is required.
Program memory
ROM
The program memory, which contains execut-
able program instructions, data and table infor-
mation, is composed of a 65536 x 16 bit format.
However as the PC (program counter) is com-
prised of only 13 bits, the remaining 3 ROM ad-
dressbitsaremanagedbydividingtheprogram
memory into 8 banks, each bank having a range
between 0000H and 1FFFH. To move from the
present ROM bank to a different ROM bank,
the higher 3 bits of the ROM address are set by
the BP (Bank Pointer), while the remaining 13
bits of the PC are set in the usual way by exe-
cuting the appropriate jump or call instruction.
As the full 16 address bits are latched during
the execution of a call or jump instruction, the
correct value of the BP must first be setup be-
fore a jump or call is executed. When either a
software or hardware interrupt is received,
note that no matter which ROM bank the pro-
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