Pin Description
Pin No
Pin Name
I/O
F unction
43~49
PA0~PA6
I
7-bit input ports, with pull-high resistors
E ach bit can be configured as a wake-up input by mask option.
Bidirectional 8-bit input/output ports, pull-high mask option
T he output structures, whether tri-state or CMOS, are
determined by software instructions.
Bidirectional 2-bit input/output ports, pull-high mask option
T he output structures, whether tri-state or CMOS, are
determined by software instructions.
54~61
PB0~PB7
I/O
62~63
PC0~PC1
I/O
1, 42,
52, 64
76
77
VSS
Negative power supply (GND)
X1
X2
I
O
X1 and X2 are connected to an external crystal to form an
internal low power oscillator clock.
OSC1 and OSC2 are connected to an RC network or a crystal
(determined by mask option) to form the system clock oscillator.
For RC operation, OSC2 is the output terminal of the system
clock.
Schmitt trigger reset input, active low
Battery fail interrupt with debounce circuit input
Schmitt trigger input for timer/event counter
40
41
OSC1
OSC2
I
O
53
68
50
2, 39, 51
67
RE S
BAF
TMR1
I
I
I
VDD
Positive power supply
65
BZ
O
Buzzer non-inverting BZ output
The BZ pin outputs “high” at buzzer off (by setting the value 00H
of 1DH)
3~34
78~80
35~38
66
75
SE G31~SE G0
SE G34~SE G32
COM3~COM0
TSC
TS
O
LCD driver outputs for LCD panel segments
O
I
I
Outputs for LCD panel common connections
μ
C test mode input pin, active low with pull-high resistor
Decoder test mode input pin, active low with a pull-high resistor
Battery low indication input, active high without pull-high
resistor
POCSAG code input serial data (inverting or non-inverting as
determined by SPF32). CMOS input without pull-high resistor
Pager receiver power control enable output, CMOS output
RF dc level adjustment pin, CMOS output
PLL control pin, CMOS output
Frequency reference output pin
The FOUT output pin produces a 76.8kHz/153.6kHz signal with
a 1/2 duty cycle reference frequency if a 76.8kHz crystal is used.
69
BAL
I
70
DI
I
71
72
73
BS1
BS2
BS3
O
O
O
74
FOUT
O
HT9480
4
23th Feb ’98