參數(shù)資料
型號(hào): HT9480
廠商: Holtek Semiconductor Inc.
英文描述: Pager Controller
中文描述: 傳呼機(jī)控制器
文件頁數(shù): 16/57頁
文件大小: 1541K
代理商: HT9480
Watchdog timer
mode initializes a “warm reset” only when the
PC and SP are reset to zero. To clear the con-
tents of the WDT (including the WDT pres-
caler), there are three methods to be adopted
namely, external reset (a low level to RE S),
software instruction(s), and a “HALT” instruc-
tion. There are two types of software instruc-
tions, “CLR WDT” and “CLR WDT1”/“CLR
WDT2”. But only one of these two types of in-
structions can be active at a time depending on
the mask option
“CLR WDT times selection
option”. If the “CL R WDT” is selected (i.e.,
CLRWDT times equal one), any execution of the
“CLR WDT” instruction clears the WDT. In the
case that “CLR WDT1” and “CLR WDT2” are
chosen (i.e., CLRWDR times equal two), these
two instructions should be executed to clear the
WDT; otherwise, the WDT may reset the chip
due to a time-out.
Powerdown operation – HALT
The HALT mode is initialized by the “HALT”
instruction and results in the following.
The system turns off. The low power oscillator,
tone generator, LCD driver, pager decoder, and
WDT oscillator all keep running (if the WDT
oscillator is selected).
The contents of the on–chip RAM and of the
registers remain unchanged.
The WDT and the WDT prescaler are cleared
and counted again (if the WDT clock is from the
WDT oscillator).
All the I/O ports remain in their original status.
The PD flag is set but the TO flag is cleared.
The system can quit the HALT mode by an
external reset, an interrupt, an external falling
edge signal on port A, or a WDT overflow. An
external reset leads to device initialization and
the WDT overflow performs a “warm reset”.
After the TO and PD flags are examined, the
reason for the chip reset is determined. The PD
flag that is cleared on power-up is set after the
“HALT” instruction is executed. The TO flag is
set when the WDT time-out occurs, which
causes a wake-up that resets only the PC and
SP, and leaves the others in their original status.
The port A wake-up and interrupt methods can
be considered as a continuation of normal exe-
cution. E very bit in port A can be independently
selected to wake up the device by mask option.
Awakening from an I/O port stimulation, the
program resumes execution of the next instruc-
tion. However, if the program awakens from an
interrupt, two sequences may occur. The pro-
gram will resume execution at the next instruc-
tion if the related interrupt(s) is (are) disabled
or the interrupt(s) is (are) enabled but the stack
is full. A regular interrupt response, on the
other hand, may take place if the interrupt is
enabled and the stack is not full.
If the wake-up event(s) occurs and the wake-up
results from an interrupt acknowledge, the actual
interrupt subroutine execution is delayed by one
or more cycles. On the other hand, if the wake-
up brings about the following instruction execu-
tion, the actual interrupt subroutine is executed
immediately after the dummy period is completed.
To minimize power consumption, the I/O pins
should all be carefully managed before entering
the HALT status.
HT9480
16
23th Feb ’98
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