
The states of the registers are summarized below.
R egister
Power-on
reset (POR )
WDT time-out
(normal
operation)
R E S reset
(normal
operation)
R E S reset
(HALT)
WDT time-
out (HALT )*
TMR0
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
TMRC0
00-0 1---
00-0 1---
00-0 1---
00-0 1---
uu-u u--
TMR1
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
TMRC1
00-0 1---
00-0 1---
00-0 1---
00-0 1---
uu-u u--
PC
0000H
0000H
0000H
0000H
0000H
MP0
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
MP1
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
ACC
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
TBLP
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
TBLH
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
STATUS
--00 xxxx
--1u uuuu
--uu uuuu
--01 uuuu
--11 uuuu
INTC
-000 0000
-000 0000
-000 0000
-000 0000
-uuu uuuu
WDTS
0000 0111
0000 0111
0000 0111
0000 0111
uuuu uuuu
PA
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
PAC
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
PB
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
PBC
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
PC
---- 1111
---- 1111
---- 1111
---- 1111
---- uuuu
PCC
---- 1111
---- 1111
---- 1111
---- 1111
---- uuuu
Note: “*” means “warm reset”
“u” means “unchanged”
“x” means “unknown”
T he measured result will remain in the
timer/event counter even when the activated
transient occurs again. In other words, only one
cycle measurement can be made until the TON
is set. The cycle measurement will re-function
as long as further transient pulses are received.
Note that, in this operation mode, the
timer/event counter starts counting not accord-
ing to the logic level but to the transient edges.
In the case of counting overflows, the counter is
re-loaded from its counter preload register and
issues an interrupt request, similar to the other
two modes.
To enable the counting operation, the value of
the timer on bit (TON; bit 4 of TMRC0 and
TMRC1) is “1”. In the pulse width measurement
mode, the TON is automatically cleared after
the measurement cycle is completed. In the
other two modes, namely the event count or
timer mode, the TON can be reset only by in-
structions. The overflow of the programmable
timer counter and of the timer/event counter
can be configured as one of the wake-up
sources. No matter what type of operation mode
is chosen, writing a 0 to E T0I and E T1I disables
the interrupt service of the programmable
timer counter and the timer/event counter, re-
spectively.
HT9480
19
23th Feb ’98