
A codeword is either an address or a message
codeword. Idle codewords are transmitted to
fill in empty batches or to separate messages.
An address codeword is coded as shown above.
Of the 21 bits of user addresses, 18 bits are
coded in the codeword itself (bits 2 to 19),
which is protected against transmission er-
rors by a number of CRC checkbits (bits 22 to
31). Bit 32 is an overall even-parity bit.
The two function bits (bits 20 and 21) allow
distinction of four different calls to one user ad-
dress as shown in following Table.
Bit 20
(MSB)
Bit 21
(L SB)
Call Type
Data F ormat
0
0
Numeric
4-bits per digit
0
1
Alert only
—
1
0
Alert only
—
1
1
Alpha-numeric
7-bits per ASCII
character
An idle codeword is a valid address codeword,
which cannot be allocated to the pager.
There is a total of 20 bits of caller information
to be put into a message codeword (bits 2 to 21),
which is protected by the CRC checkbits (bits 22 to
31).
Decoding of the POCSAG data stream
The POCSAG coded input data received from
RF module is first filtered by an internal digi-
tal filter in the decoder. From the filtered
data, a sampling clock synchronous to the
data rate is derived. The decoder supports
512, 1200, and 2400 bits per second data rate,
which in turn results in their corresponding
sampling clock frequency.
Upon detection of a valid call, the decoder
performs several operations (refer to the fol-
lowing section of the Message Data Transfer).
Call termination is normally deemed when a
valid idle or another address codeword is re-
ceived after a message code word.
E rroneous codewords
Upon receipt of erroneous uncorrectable code-
words, call termination occurs according to
the conditions given below:
SPF 08 SPF 09 Call Termination E vent
0
X
Any two consecutive
codewords or the
codeword directly
following the address
codeword in error
1
0
Any single codeword in error
1
1
Any two consecutive
codewords in error
Error correction
Item
Description
Preamble
4 random errors in 31 bits
Synchronization
code-word
2 random errors in 32 bits
Address
code-word
2 random errors, or 4-bit
burst errors (optional)
Message
code-word
2 random errors, or 4-bit
burst errors (optional)
In the HT9480 error correction methods have
been implemented as shown in above Table.
Random error correction is default for both ad-
dress and message code-words. Burst error cor-
rection can be switched by SPF 15. Up to 4 bits
of burst errors can be corrected.
Decoder interface
The HT9480 has two interfaces available. One
is the pager control address (1EH), which con-
trols the operation and configuration of the de-
coder. The other is the pager data address
(1FH), which places the message data of calls in
the parallel mode.
HT9480
24
23th Feb ’98