HT47C20L
34
January 18, 2000
Low voltage reset
LVR
The low voltage reset circuit is used to monitor
the power supply of the device. If the power sup-
ply voltage of the device is lower than 1.1V 0.1V,
thedevicewillautomaticallyresetinternally.Itis
enabled or disabled by mask option.
The LVR includes the following specification:
The low voltage (lower than 1.1V 0.1V) must
be maintained for over 1ms. If the low voltage
state does not exceed 1ms, the LVR will ignore
it and does not perform the reset function.
The LVR uses the OR function with the ex-
ternal RES signal to perform chip reset.
During HALT mode, if the LVR occurs, the
device will wake-up and the PD flag will be
set as 1 , the same as the RES reset.
Mask option
The following shows many kinds of mask options in the HT47C20L. All these options should be
defined in order to ensure proper system functioning.
No.
Mask Option
1
WDT enable/disable selection. WDT can be enabled or disabled by mask option.
2
CLR WDT times selection. This option defines how to clear the WDT by instruction. One
time meansthatthe CLRWDT cancleartheWDT. Twotimes meansthatonlyifbothof
the CLR WDT1 and CLR WDT2 have been executed, then WDT can be cleared.
Time base time-out period selection. The time base time-out period ranges from f
s
/2
12
to
f
s
/2
15
. f
s
stands for the 32768Hz frequency.
Buzzer output frequency selection. There are eight types of frequency signals for the buzzer
output: f
s
/2
2
~f
s
/2
9
. f
s
stands for the 32768Hz.
Wake-up selection. This option defines the wake-up function activity. External I/O pins (PA
NMOS output only) all have the capability to wake-up the chip from a halt mode by a follow-
ing edge.
3
4
5
6
Pull high selection. This option is to decide whether the pull high resistance is viable or not
on the low nibble of the PA.
7
PA CMOS or NMOS selection.
The structure of the low nibble of the PA can be selected as CMOS or NMOS. When CMOS is
selected, the related pins can only be used for output operations. When NMOS is selected,
the related pins can be used for input or output operations.
8
I/O pins share with other function selection.
PA0/BZ, PA1/BZ: PA0 and PA1 can be set as I/O pins or buzzer outputs.
PA3/PFD: PA3 can be set as I/O pins or PFD output.
9
LCD common selection. There are three types of selection: 2 common (1/2 duty, 1/2 bias) 3
common (1/3 duty, 1/2 bias) or 4 common (1/4 duty, 1/3 bias). If the 4 common is selected, the
segment output pin SEG19/COM3 will be set as a common output COM3 .
10
The low voltage reset and the low voltage detector enable or disable selection.
There are three types of selection. The low voltage reset and the voltage detector are both
enabled or both disabled or the low voltage reset is disabled but the voltage low detector is
enabled.
11
LCD on or LCD off at the halt mode selection.
The LCD can be enable or disable at the halt mode by mask option.