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參數(shù)資料
| 型號(hào)： | HT47C20L |
| 廠商： | Holtek Semiconductor Inc. |
| 元件分類： | 數(shù)學(xué)處理器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 18/55頁 |
| 文件大?。?/td> | 341K |
| 代理商： | HT47C20L |
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HT47C20L
18
January 18, 2000
The system can leave the halt mode by means of
an external reset, an interrupt, an external fall-
ing edge signal on port Aor a WDT overflow. An
external reset causes a device initialization and
the WDT overflow performs a warm reset . Ex-
amining the TO and PD flags, the reason for
chip reset can be determined. The PD flag is
cleared when system power-up or executing the
CLRWDTinstructionandissetwhentheHALT
instruction is executed. The TO flag is set if the
WDT time-out occurs, and causes a wake-up
that only resets the PC and SP, the others main-
tain their original status.
The port A wake-up and interrupt methods can
be considered as a continuation of normal execu-
tion. Each bit in port A can be independently se-
lected to wake up the device by mask option.
Awakening from an I/O port stimulus, the pro-
gram will resume execution of the next instruc-
tion. If awakening from an interrupt, two
sequencesmayhappen.Iftherelatedinterruptis
disabled or the interrupt is enabled but the stack
is full, the program will resume execution at the
next instruction. If the interrupt is enabled and
the stack is not full, a regular interrupt response
takes place.
If an interrupt request flag is set to 1 before en-
tering the halt mode the wake-up function of the
related interrupt will be disabled.
If the wake-up results from an interrupt acknowl-
edgment,theactualinterruptsubroutineexecution
will be delayed by more than one cycle. However, if
the wake-up results in the next instruction execu-
tion, the execution will be performed immediately.
To minimize power consumption, all the I/O pins
should be carefully managed before entering the
halt mode.
Reset
Therearethreewaysinwhicharesetmayoccur.
RES reset during normal operation
RES reset during halt mode
WDTtime-outresetduringnormaloperation
The LVR is enable and the VDD is lower then
V
LVR
The WDT time-out during halt mode is differ-
entfromotherchipresetconditions,sinceitcan
perform a warm reset that just resets the PC
and SP leaving the other circuits in their origi-
nal state. Some registers remain unchanged
during other reset conditions. Most registers
are reset to the initial condition when the re-
set conditions are met. By examining the PD
and TO flags, the program can distinguish be-
tween different chip resets .
TO
PD
RESET Conditions
0
0
System power-up
u
u
RES reset or LVR reset during
normal operation
0
1
RES reset or LVR reset
wake-up from halt mode
1
u
WDT time-out during normal
operation
1
1
WDT wake-up from halt mode
Note: u means unchanged
Toguaranteethatthecrystaloscillatorhasstarted
and stabilized, the SST (system start-up timer)
provides an extra delay of 8192 system clock
pulses when the system powers up.
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| HT47C20 | 8-BIT MICROCONTROLLER |
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| HT48C05 | Cost-Effective I/O Type 8-Bit MCU |
| HT48C06 | Cost-Effective I/O Type 8-Bit MCU |
| HT48C10-1 | 8-Bit High Performance RISC-like Microcontroller Suitable for Multiple I/O Application(高性能、指令類似RISC的8位微控制器，用于多I/O接口設(shè)備) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| HT47C20L_05 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:R-F Type Low Voltage 8-Bit Mask MCU |
| HT47M50 | 制造商:NTE Electronics 功能描述: |
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| HT47R20A-1 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:R-F Type 8-Bit MCU |
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