參數(shù)資料
型號(hào): HT47C20
廠商: Holtek Semiconductor Inc.
元件分類: 8位微控制器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁(yè)數(shù): 33/56頁(yè)
文件大?。?/td> 352K
代理商: HT47C20
HT47C20
33
January 18, 2000
Buzzer
HT47C20providesapairofbuzzeroutputBZand
BZ, which share pins with PA0 and PA1 respec-
tively, as determined by mask option. Its output
frequency can also be selected by mask option.
When the buzzer function is selected, setting
PA.0 and PA.1 0 simultaneously will enable
the buzzer output and setting PA.0 1 will dis-
able the buzzer output and setting PA.0 0 and
PA.1 1 will only enable the BZ output and dis-
able the BZ output.
PA1
PA0
Function
0
(CLR PA.1)
0
(CLR PA.0)
PA0=BZ,
PA1=BZ
1
(SET PA.1)
0
(CLR PA.0)
PA0=BZ,
PA1=0
X
1
(SET PA.0)
PA0=0,
PA1=0
Buzzer enable
IR carrier
HT47C20 provides carrier driving capability
that allows for easy interfacing to an infrared
diode, which share pin with PA2, as determined
by mask option.
When the carrier option is selected, setting PA2
0 ( CLR PA.2 ) will enable the carrier output
and setting PA2 1 ( SET PA.2 ) will disable
the carrier output and the PA2 output is at low
level. The IR carrier frequency is system clock
divided by 12 and it is 1/4 duty.
PA2
Function
0
(CLR PA.2)
PA2=IR carrier output
1
(SET PA.2)
PA2=0
Programmable frequency divider
PFD
The PFD output shares pin with PA3, as deter-
mined by mask option.
When the PFD option is selected, setting PA3
0 ( CLR PA.3 ) will enable the PFD output
and setting PA3 1 ( SET PA.3 ) will disable
the PFD output and PA3 output at low level.
PFD output frequency =
1
2
timer overflow period
1
PA3
Function
0 (CLR PA.2)
PA3= PFD output
1 (SET PA.2)
PA3= 0
Register Bit No.
Label
Read/Write Reset
Function
RTCC
(09H)
0
1
2
RT0
RT1
RT2
R/W
1
1
1
8 to 1 multiplexer control inputs to select the
real time clock prescaler output
3
Unused bit, this bit must clear to 0
4
SAVE
R/W
0
Control the RTC OSC to oscillate quickly.
0 enable
1 disable
After power on, set this bit to 1 to reduce
power comsumption
5
Unused bit, this bit is unknow for reading
6, 7
Unused bits, read as 0
RTCC Register
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