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參數(shù)資料
| 型號(hào)： | HT47C20 |
| 廠商： | Holtek Semiconductor Inc. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 17/56頁 |
| 文件大?。?/td> | 352K |
| 代理商： | HT47C20 |
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HT47C20
17
January 18, 2000
methods are adopted, external reset (a low level
toRES),softwareinstruction,oraHALTinstruc-
tion. The software instructions are of two types
which includeCLRWDTandtheotherset
WDT1andCLRWDT2.Ofthesetwotypesofin-
struction, only one can be active depending on
the mask option
CLR WDT times selection op-
tion . If the CLR WDT is selected (i.e., CLR
WDT times equal one), any execution of the CLR
WDT instruction will clear the WDT. In case CLR
WDT1 and CLR WDT2 are chosen (i.e. CLR
WDT times equal two), these two instructions
must be executed to clear the WDT; otherwise,
the WDT may reset the chip because of
time-out.
CLR
The WDT time-out period ranges from
f
s/215
~f
s/216
. Because the CLR WDT or CLR
WDT1 and CLRWDT2 instruction only clear
the last two-stage of the WDT.
Multi-function timer
The HT47C20 provides a multi-function timer
for WDT, time base and real time clock but with
different time-out periods. The multi-function
timer consists of a 7-stage divider and an 8-bit
prescaler, with the clock source coming from
WDT OSC or RTC OSC or the instruction clock
(i.e., system clock divided by 4). The
multi-function timer also provides a selectable
frequency signal (ranges from f
s
/2
2
to f
s
/2
8
) for
LCD driver circuits, and a selectable frequency
signal (ranges from f
s
/2
2
to f
s
/2
9
) for buzzer out-
put by mask option. It is recommended to select
a near 4kHz signal for LCD driver circuits for
proper display.
Time base
The time base offers a periodic time-out period
to generate a regular internal interrupt. Its
time-out period ranges from f
s
/2
12
to f
s
/2
15
se-
lected by mask option. If time base time-out oc-
curs, the related interrupt request flag (TBF;
bit 5 of INTC0) is set. But if the interrupt is en-
abled, and the stack is not full, a subroutine call
to location 08H occurs.
When the HALT instruction is executed, the
time base still works (if WDT clock source co-
mes from WDT RC OSC or RTC OSC) and can
wake up from halt mode.
If the TBF is set 1 before entering the halt
mode, the wake up function will be disable.
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+ 8 A
0 3 : 6 8 A
'
-
-
(
'
( ( ( 2 ( '
:
6
'
Watchdog timer
4
( ( ( ( ( ( ( (
'
+ ( "
*
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'
( ( ( 2 ( '
9
A A
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( ( 2 ( '
5
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Time base
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