參數(shù)資料
型號(hào): HT47C20
廠商: Holtek Semiconductor Inc.
元件分類: 8位微控制器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁數(shù): 28/56頁
文件大小: 352K
代理商: HT47C20
HT47C20
28
January 18, 2000
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PA0/BZ, PA1/BZ input/output port
Input/output ports
There are 8-bit bidirectional input/output port
and4-bitinputportintheHT47C20,labeledPA
and PB which are mapped to the data memory
of [12H] and [14H] respectively. The high nibble
of the PA is NMOS output and input with
pull-high resisters. The low nibble of the PAcan
be used for input/output or output operation by
selecting NMOS or CMOS output by mask op-
tion. Each bit on the PA can be configured as a
wake-up input, and the low nibble of the PA
with or without pull-high resistor by mask op-
tion. PB can only be used for input operation,
and each bit on the port can be configured with
pull high resistor by mask option. Both are for
the input operation, these ports are
non-latched, that is, the inputs should be ready
at the T2 rising edge of the instruction MOV A,
[m] (m=12H or 14H). For PAoutput operation,
all data are latched and remain unchanged un-
til the output latch is rewritten.
When the structures of PA are open drain
NMOS type, it should be noted that, before
reading data from the pads, a 1 should be
written to the related bits to disable the NMOS
device. That is done first before executing the
instruction MOV A, 0FFH and MOV [12H],
A to disable related NMOS device, and then
MOV A, [12H] to get stable data.
After chip reset, these input lines remain at a
high level or are left floating (by mask option).
Some instructions first input data and then fol-
low the output operations. For example, SET
[m].i , CLR [m].i , CPL [m] , CPLA[m] read
the entire port states into the CPU, execute the
defined operations (bit-operation), and then
write the results back to the latches or to the ac-
cumulator. Each bit of the PA output latches
can not use these instruction, which may
change the input lines to output lines (when in-
put line is at low level).
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