HT47C20
16
January 18, 2000
Oscillator configuration
There are two oscillator circuits in the HT47C20.
Both are designed for system clocks; the RC oscil-
lator and the crystal oscillator, which are deter-
mined by mask option. No matter what oscillator
type is selected, the signal provides the system
clock. The halt mode stops the system oscillator
andignoresanexternalsignaltoconservepower.
The OSC1 and OSC2 are at the same level
when the system enters the power down mode.
If an RC oscillator is used, an external resistor
between OSC1 and OSC2 is need and the resis-
tance must range from 51k
oscillator provides the most cost effective solu-
tion. However, the frequency of the oscillation
may vary with VDD, temperature and the chip
itself due to process variations. It is, therefore,
not suitable for timing sensitive operations
where accurate oscillator frequency is desired.
to 1M . The RC
If a crystal oscillator is used, a crystal across
OSC1 and OSC2 is needed to provide the feed-
back and phase shift needed for oscillator, no
other external components are needed. Instead
of a crystal, a resonator can also be connected
between OSC1 and OSC2 to get a frequency ref-
erence, but two external capacitors in OSC1
and OSC2 are required.
There is another oscillator circuit designed for
the real time clock. In this case, only the
32768kHz crystal oscillator can be applied. The
crystal should be connected between OSC3 and
OSC4, and two external capacitors along with
one external resistor are required for the oscil-
lator circuit in order to get a stable frequency.
The RTC oscillator circuit can be controlled to
oscillate quickly by setting SAVE
RTCC) to 0 . After power on reset, the SAVE
bit initial value is
bit (bit 4 of
0
that is on the
quick-oscillate mode. It s recommended to turn
itoffbysettingthe SAVE bit 1 afteraperiod
ofabout2secondstoavoiddrainingextrapower.
The WDT oscillator is a free running on-chip
RC oscillator, and no external components are
required. Even if the system enters the power
down mode, the system clock is stopped, but the
WDT oscillator still works with a period of ap-
proximately 90 s. The WDT oscillator can be
disabled by mask option to conserve power.
Watchdog timer
WDT
The clock source of the WDT(f
s
) is implemented
by a dedicated RC oscillator (WDT oscillator) or
a instruction clock (system clock divided by 4)
or a real time clock oscillator (RTC oscillator),
decided by mask options. The timer is designed
to prevent a software malfunction or sequence
jumping to an unknown location with unpre-
dictable results. The watchdog timer can be dis-
abled by a mask option. If the watchdog timer is
disabled, all the executions related to the WDT
result in no operation.
If the clock source of WDT chooses the internal
WDT oscillator, the time-out period may vary
with temperature, VDD, and process varia-
tions. On the other hand, if the clock source se-
lects the instruction clock and the
instruction is executed, WDT may stop count-
ing and lose its protecting purpose, and the
logic can only be restarted by external logic.
HALT
When the device operates in a noisy environ-
ment, using the on-chip RC oscillator (WDT
OSC)isstronglyrecommended,sincetheHALT
can cease the system clock.
The WDT overflow under normal operation will
initialize chip reset and set the status bit TO.
Whereas in the halt mode, the overflow will ini-
tialize a warm reset only the PC and SP are
reset to zero. To clear the contents of WDT, three
0
.
0 3 : 6 8 A
RTC oscillator
$
* (
* *
(
* *
System oscillator