參數(shù)資料
型號: HT46C24
廠商: Holtek Semiconductor Inc.
英文描述: A/D Type 8-Bit MCU
中文描述: 的A / D型8位微控制器
文件頁數(shù): 7/49頁
文件大小: 393K
代理商: HT46C24
HT46R24/HT46C24
Rev. 1.50
7
May 3, 2004
Program Memory
EPROM
Theprogrammemory(EPROM)isusedtostorethepro-
gram instructions which are to be executed. It also con-
tains data, table, and interrupt entries, and is organized
into 8192 16 bits which are addressed by the PC and
table pointer.
Certain locations in the ROM are reserved for special
usage:
Location 000H
Location 000H is reserved for program initialization.
After chip reset, the program always begins execution
at this location.
Location 004H
Location 004H is reserved for the external interrupt
service program. If the INT input pin is activated, and
the interrupt is enabled, and the stack is not full, the
program begins execution at location 004H.
Location 008H
Location 008H is reserved for the Timer/Event Coun-
ter 0 interrupt service program. If a timer interrupt re-
sults from a Timer/Event Counter 0 overflow, and if the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 008H.
Location 00CH
Location 00CH is reserved for the Timer/Event Coun-
ter 1 interrupt service program. If a timer interrupt re-
sults from a Timer/Event Counter 1 overflow, and if the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 00CH.
Location 010H
Location 010H is reserved for the A/D converter inter-
rupt service program. If an A/D converter interrupt re-
sults from an end of A/D conversion, and if the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 010H.
Location 014H
This area is reserved for the I
2
C Bus interrupt service
program. If the I
2
C Bus interrupt resulting from a slave
address is match or completed one byte of data trans-
fer, and if the interrupt is enable and the stack is not
full, the program begins execution at location 014H.
Table location
Any location in the ROM can be used as a look-up ta-
ble. The instructions TABRDC [m] (the current page,
page=256 words) and TABRDL [m] (the last page)
transfer the contents of the lower-order byte to the
specified data memory, and the contents of the
higher-order byte to TBLH (Table Higher-order byte
register)(08H).Onlythedestinationofthelower-order
byte in the table is well-defined; the other bits of the ta-
ble word are all transferred to the lower portion of
TBLH. The TBLH is read only, and the table pointer
(TBLP) is a read/write register (07H), indicating the ta-
ble location. Before accessing the table, the location
should be placed in TBLP. All the table related instruc-
tions require 2 cycles to complete the operation.
These areas may function as a normal ROM depend-
ing upon the users requirements
Stack Register
STACK
This is a special part of the memory which is used to
save the contents of the program counter (PC) only. The
stackisorganizedinto16levelsandisneitherpartofthe
data nor part of the program space, and is neither read-
able nor writeable. The activated level is indexed by the
stack pointer (SP) and is neither readable nor writeable.
At the state of a subroutine call or an interrupt acknowl-
edgment, the contents of the program counter are
pushedontothestack.Attheendofthesubroutineoran
interruptroutine,signaledbyareturninstruction(RETor
RETI), the program counter is restored to its previous
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Program Memory
Instruction
Table Location
*12
*11
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P12
P11
P10
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
1
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Table Location
Note: *12~*0: Table location bits
@7~@0: Table pointer bits
P12~P8: Current program counter bits
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