HT46R24/HT46C24
Rev. 1.50
21
May 3, 2004
The following two programming examples illustrate how to setup and implement an A/D conversion. In the first exam-
ple, the method of polling the EOCB bit in the ADCR register is used to detect when the conversion cycle is complete,
whereas in the second example, the A/D interrupt is used to determine when the conversion is complete.
Example: using EOCB Polling Method to detect end of conversion
clr INTC1.0
mov a,00100000B
mov ADCR,a
; disable A/D interrupt in interrupt control register
; setup ADCR register to configure Port PB0~PB3 as A/D inputs and select
; AN0 to be connected to the A/D converter
mov a,00000001B
mov ACSR,a
; setup the ACSR register to select f
SYS
/8 as the A/D clock
Start_conversion:
clr ADCR.7
set ADCR.7
clr ADCR.7
; reset A/D
; start A/D
Polling_EOC:
sz ADCR.6
jmp polling_EOC
mov a,ADRH
mov adrh_buffer,a
mov a,ADRL
mov adrl_buffer,a
; poll the ADCR register EOCB bit to detect end of A/D conversion
; continue polling
; read conversion result from the high byte ADRH register
; save result to user defined register
; read conversion result from the low byte ADRL register
; save result to user defined register
:
:
jmp start_conversion
; start next A/D conversion
Example: using Interrupt method to detect end of conversion
set INTC0.0
set INTC1.0
mov a,00100000B
mov ADCR,a
; interrupt global enable
; enable A/D interrupt in interrupt control register
; setup ADCR register to configure Port PB0~PB3 as A/D inputs and select
; AN0 to be connected to the A/D converter
mov a,00000001B
mov ACSR,a
; setup the ACSR register to select f
SYS
/8 as the A/D clock
start_conversion:
clr ADCR.7
set ADCR.7
clr ADCR.7
; reset A/D
; start A/D
:
:
; interrupt service routine
EOC_service routine:
mov a_buffer,a
mov a,ADRH
mov adrh_buffer,a
mov a,ADRL
mov adrl_buffer,a
; save ACC to user defined register
; read conversion result from the high byte ADRH register
; save result to user defined register
; read conversion result from the low byte ADRL register
; save result to user defined register
clr ADCR.7
set ADCR.7
clr ADCR.7
; reset A/D
; start A/D
mov a,a_buffer
reti
; restore ACC from temporary storage