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參數(shù)資料
| 型號： | HT46C24 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | A/D Type 8-Bit MCU |
| 中文描述： | 的A / D型8位微控制器 |
| 文件頁數(shù)： | 25/49頁 |
| 文件大?。?/td> | 393K |
| 代理商： | HT46C24 |
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HT46R24/HT46C24
Rev. 1.50
25
May 3, 2004
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2
C Communication Timing Diagram
Start Signal
The START signal is generated only by the master de-
vice. The other device in the bus must detect the START
signal to set the I
2
C Bus busy bit (HBB). The STARTsig-
nal is SDA line from high to low, when SCL is high.
Slave Address
The master must select a device for transferring the
data by sending the slave device address after the
START signal. All device in the I
2
C Bus will receive the
I
2
C Bus slave address (7 bits) to compare with its own
slave address (7 bits). If the slave address is matched,
the slave device will generate an interrupt and save the
following bit (8th bit) to SRW bit and sends an acknowl-
edge bit (low level) to the 9th bit. The slave device also
sets the status flag (HAAS), when the slave address is
matched.
In interrupt subroutine, check HAAS bit to know whether
the I
2
C Bus interrupt comes from a slave address that is
matched or a data byte transfer is completed. When the
slave address is matched, the device must be in trans-
mit mode or receive mode and write data to HDR or
dummy read from HDR to release the SCL line.
SRW Bit
The SRW bit means that the master device wants to
read from or write to the I
2
C Bus. The slave device
check this bit to understand itself if it is a transmitter or a
receiver. The SRW bit is set to 1 means that the mas-
ter wants to read data from the I
2
C Bus, so the slave de-
vice must write data to a bus as a transmitter. The SRW
is cleared to 0 means that the master wants to write
data to the I
2
C Bus, so the slave device must read data
from the I
2
C Bus as a receiver.
Acknowledge Bit
Oneoftheslavedevicegeneratesanacknowledgesignal,
when the slave address is matched. The master device
can check this acknowledge bit to know if the slave device
accepts the calling address. If no acknowledge bit, the
mastermustsendaSTOPbitandendthecommunication.
When the I
2
C Bus status register bit 6 HAAS is high, it
means the address is matched, so the slave must check
SRW as a transmitter (set HTX) to 1 or as a receiver
(clear HTX) to 0 .
"
Start Bit
"
Stop Bit
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HT46R24 | A/D Type 8-Bit MCU |
| HT46C46 | Cost-Effective A/D Type 8-Bit MCU |
| HT46C47 | Cost-Effective A/D Type 8-Bit MCU |
| HT46R46 | Cost-Effective A/D Type 8-Bit MCU |
| HT46C62 | A/D with LCD Type 8-Bit MCU |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HT46C46 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Cost-Effective A/D Type 8-Bit MCU |
| HT46C46E | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Cost-Effective A/D Type 8-Bit MCU |
| HT46C47 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Cost-Effective A/D Type 8-Bit MCU |
| HT46C47E | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Cost-Effective A/D Type 8-Bit MCU |
| HT46C48A | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Cost-Effective A/D Type 8-Bit MCU |
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