參數(shù)資料
型號(hào)： HT46C24
廠商： Holtek Semiconductor Inc.
英文描述： A/D Type 8-Bit MCU
中文描述： 的A / D型8位微控制器
文件頁(yè)數(shù)： 22/49頁(yè)
文件大?。?/td> 393K
代理商： HT46C24
HT46R24/HT46C24
Rev. 1.50
22
May 3, 2004
Low Voltage Reset
LVR
The microcontroller provides low voltage reset circuit in
order to monitor the supply voltage of the device. If the
supply voltage of the device is within the range
0.9V~V
LVR
, such as changing a battery, the LVR will au-
tomatically reset the device internally.
The LVR includes the following specifications:
The low voltage (0.9V~V
LVR
) has to remain in their
original state to exceed 1ms. If the low voltage state
does not exceed 1ms, the LVR will ignore it and do not
perform a reset function.
The LVR uses the OR function with the external RES
signal to perform chip reset.
TherelationshipbetweenV
DD
andV
LVR
isshownbelow.
Note: V
OPR
is the voltage range for proper chip
operation at 4MHz system clock.
I
2
C Bus Serial Interface
I
2
C Bus is implemented in the device. The I
2
C Bus is a
bidirectional two-wire lines. The data line and clock line
are implement in SDA pin and SCL pin. The SDA and
SCL are NMOS open drain output pin. They must con-
nect a pull-high resistor respectively.
Using the I
2
C Bus, the device has two ways to transfer
data. One is in slave transmit mode, the other is in slave
receive mode. There are four registers related to I
2
C
Bus; HADR([20H]), HCR([21H]), HSR([22H]),
HDR([23H]). The HADR register is the slave address
setting of the device, if the master sends the calling ad-
dress which match, it means that this device is selected.
The HCR is I
2
C Bus control register which defines the
device enable or disable the I
2
C Bus as a transmitter or
as a receiver. The HSR is I
2
C Bus status register, it re-
sponds with the I
2
C Bus status. The HDR is input/output
data register, data to transmit or receive must be via the
HDR register.
The I
2
C Bus control register contains three bits. The
HEN bit defines whether to enable or disable the I
2
C
Bus. If the data wants to transfer via I
2
C Bus, this bit
must be set. The HTX bit defines whether the I
2
C Bus is
in transmit or receive mode. If the device is as a trans-
mitter, this bit must be set to 1 . The TXAK defines the
transmit acknowledge signal, when the device received
8-bit data, the device sends this bit to I
2
C Bus at the 9th
clock. If the receiver wants to continue to receive the
next data, this bit must be reset to 0 before receiving
data.
6 D 6
0 D (
D
( D 8
"
6 D 6
6 D 6
"
( D 8
(
*
.
E
E
. *
"
*
*
.
Low Voltage Reset
Note:
*1: To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024 system
clock pulses before entering the normal operation.
*2: Since low voltage state has to be maintained in its original state for over 1ms, therefore after 1ms delay,
the device enters the reset mode.
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