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參數(shù)資料
| 型號： | HB52RF1289E2 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 1 GB Registered SDRAM DIMM(1GB 寄存同步DRAM DIMM) |
| 中文描述： | 1 GB的注冊SDRAM的內(nèi)存（1GB的寄存同步的DRAM內(nèi)存） |
| 文件頁數(shù)： | 18/21頁 |
| 文件大?。?/td> | 95K |
| 代理商： | HB52RF1289E2 |
HB52RF1289E2-75B
18
A0 to A12 (input pins):
Row address (AX0 to AX12) is determined by A0 to A12 level at the bank active
command cycle CK rising edge. Column address (AY0 to AY9, AY11) is determined by A0 to A9, A11 level
at the read or write command cycle CK rising edge. And this column address becomes burst access start ad-
dress. A10 defines the precharge mode. When A10 = High at the precharge command cycle, all banks are
precharged. But when A10 = Low at the precharge command cycle, only the bank that is selected by BA0/
BA1 (BA) is precharged.
BA0/BA1 (input pin):
BA0/BA1 are bank select signal (BA). The memory array is divided into bank 0,
bank 1, bank 2 and bank 3. If BA0 is Low and BA1 is Low, bank 0 is selected. If BA0 is High and BA1 is
Low, bank 1 is selected. If BA0 is Low and BA1 is High, bank 2 is selected. If BA0 is High and BA1 is
High, bank 3 is selected.
CKE0 (input pin):
This pin determines whether or not the next CK is valid. If CKE is High, the next CK
rising edge is valid. If CKE is Low, the next CK rising edge is invalid. This pin is used for power-down and
clock suspend modes.
DQMB0 to DQMB7 (input pins):
Read operation: If DQMB is High, the output buffer becomes High-Z.
If the DQMB is Low, the output buffer becomes Low-Z.
Write operation: If DQMB is High, the previous data is held (the new data is not written). If DQMB is Low,
the data is written.
DQ0 to DQ63, CB0 to CB7 (input/output pins):
Data is input to and output from these pins.
V
CC
(power supply pins):
3.3 V is applied.
V
SS
(power supply pins):
Ground is connected.
REGE (input pins):
If REGE is High, the register is “registered“ mode. If REGE is Low, the register is
“buffered“ mode.
Detailed Operation Part
Refer to the HM5225165B/HM5225805B/HM5225405B-75/A6/B6 datasheet.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HB52RF329E2 | 256 MB Registered SDRAM DIMM(256 MB 寄存同步DRAM DIMM) |
| HB52RF648DC-B | 512 MB Unbuffered SDRAM S.O.DIMM 64-Mword 】 64-bit, 133/100 MHz Memory Bus, 2-Bank Module (16 pcs of 32 M 】 8 components) PC133/100 SDRAM |
| HB52RD648DC-B | 512 MB Unbuffered SDRAM S.O.DIMM 64-Mword 】 64-bit, 133/100 MHz Memory Bus, 2-Bank Module (16 pcs of 32 M 】 8 components) PC133/100 SDRAM |
| HB52RF649DC | 512MB Unbuffered SDRAM S.O.DIMM |
| HB52RD649DC-A6B | 512MB Unbuffered SDRAM S.O.DIMM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HB52RF1289E2-75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:x72 SDRAM Module |
| HB52RF1289E2U-75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1 GB Registered SDRAM DIMM 128-Mword × 72-bit, 133 MHz Memory Bus, 2-Bank Module (36 pcs of 64 M × 4 Components) PC133 SDRAM |
| HB52RF328GB-75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256MB Unbuffered SDRAM Micro DIMM |
| HB52RF328GB-75BL | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256MB Unbuffered SDRAM Micro DIMM |
| HB52RF328GB-B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256MB Unbuffered SDRAM Micro DIMM |
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