參數(shù)資料
型號: GS4900BCNE3
廠商: Gennum Corporation
英文描述: SD Clock and Timing Generator with GENLOCK
中文描述: 統(tǒng)計時鐘和定時發(fā)生器鎖相
文件頁數(shù): 86/95頁
文件大?。?/td> 898K
代理商: GS4900BCNE3
GS4901B/GS4900B Preliminary Data Sheet
37703 - 0
April 2006
86 of 95
HD_Reference_Enable
82h
15-8
Reserved. Set these bits to zero when writing to 82h.
82h
7
HD_Ref_Enable - Set this bit HIGH to allow the device
to recognize the HD input reference formats that have
also been enabled in the Reference_Standard_Disable
register (address 11h-13h).
When this bit is set HIGH, the GS4901B/GS4900B will
only assert REF_LOST when the input signal is
removed.
Reference:
Section 3.5 on page 42
.
R/W
0
82h
6-0
Reserved. Set these bits to zero when writing to 82h.
Ln_Count_Reset
83h
15
Toggle this bit to reset the line-based counters in the
device.
This is only required when locking the
525-line SD
output standards to the
“f/1.001”
HD input reference
standards, AND:
1. The reference has been removed and subsequently
re-applied. In this case, the user should wait until the
reference has been re-detected by the device, which
may take up to 4 frames. See
Section 3.5.3 on
page 44
.
OR
2. The device is locked to blanking signals from a
deserializer, and the SDI input to the deserializer has
been switched upstream from the system. See
Section 3.6.3 on page 51
.
R/W
0
83h
14-0
Reserved. Set these bits to zero when writing to 83h.
Table 3-13: Configuration and Status Registers (Continued)
Register Name
Address
Bit
Description
R/W
Default
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