- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384345 > GS4900BCNE3 (Gennum Corporation) SD Clock and Timing Generator with GENLOCK PDF資料下載
參數(shù)資料
| 型號(hào)： | GS4900BCNE3 |
| 廠商： | Gennum Corporation |
| 英文描述： | SD Clock and Timing Generator with GENLOCK |
| 中文描述： | 統(tǒng)計(jì)時(shí)鐘和定時(shí)發(fā)生器鎖相 |
| 文件頁數(shù)： | 47/95頁 |
| 文件大小： | 898K |
| 代理商： | GS4900BCNE3 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁當(dāng)前第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁
GS4901B/GS4900B Preliminary Data Sheet
37703 - 0
April 2006
47 of 95
If the device determines that the output can be automatically genlocked to the input
reference, it will lock the output format to the reference, adjust the output timing
signals based on the genlock timing offset registers (Section 3.2.1.1 on page 37),
and then set the LOCK_LOST pin LOW.
If the device cannot automatically genlock the output to the applied reference, the
LOCK_LOST pin will be set HIGH and the device will operate in Free Run mode.
Individual H, V, and F-locked signals can be read from the Genlock_Status register
of the host interface. Additionally, designated bits in the Genlock_Control register
may be configured to permit the genlock block to ignore invalid timing on the
HSYNC, VSYNC, or FSYNC pin when determining the locked status of the device.
These registers are described in Section 3.9.3 on page 66.
The user may disable one or more of the 36 video standards listed in
Table 1-2
from being used to genlock the output by setting the Reference_Standard_Disable
register located at address 11h-13h of the host interface. If a reference is applied
that is disabled in the Reference_Standard_Disable register, the lock process will
fail when the application layer sets GENLOCKb = LOW.
NOTE: If the device is already genlocked to an input reference and the applied
standard is subsequently disabled in the Reference_Standard_Disable register,
the device will remain locked.
By default, the HD video reference formats are disabled in the
Reference_Standard_Disable register and so must be enabled by the user before
attempting to lock to an HD reference. See
Section 1.4 on page 20
.
3.6.1 Adjustable Locking Time
The GS4901B/GS4900B offers two different locking mechanisms to allow the user
to control the PLL lock time and the integrity of the output signal during the locking
process. The locking process is said to take place after the application of the input
reference and before the LOCK_LOST signal is set LOW.
By default, the internal PLL will crash lock. This locking process will ensure a
minimum PLL locking time; however, crash lock will cause the phase of the output
clock and timing signals to jump during the locking process. The crash behaviour
of the video PLL is controlled by the Crash_Time bits of register address 24h.
Alternatively, the user may set bit 1 of register 16h HIGH to force the PLL to drift
lock. Drift lock will increase the locking time of the PLL, but will maintain the signal
integrity of the output clock and timing pulses during the locking process.
Table 3-4: Cross-reference Genlock Table
Input Reference Format
1
2
3
4
5
1
3
4
5
6
7
8
9
10
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
25
26
27
29
30
31
32
33
34
35
36
37
38
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS4901B | SD Clock and Timing Generator with GENLOCK |
| GS4901BCNE3 | SD Clock and Timing Generator with GENLOCK |
| GS4910B | HD/SD/Graphics Clock and Timing Generator with GENLOCK |
| GS4910BCNE3 | HD/SD/Graphics Clock and Timing Generator with GENLOCK |
| GS4911B | HD/SD/Graphics Clock and Timing Generator with GENLOCK |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS4901B | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:SD Clock and Timing Generator with GENLOCK |
| GS4901B_09 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:SD Clock and Timing Generator with GENLOCK |
| GS4901BCNE3 | 功能描述:IC RE-TIMER RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| GS4910B | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:HD/SD/Graphics Clock and Timing Generator with GENLOCK |
| GS4910BCNE3 | 功能描述:IC RE-TIMER RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。