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GS1531 Data Sheet
30573 - 4
July 2005
29 of 49
4.6.2.1 Video Standard Indication
The video standard codes reported in the VD_STD[4:0] bits of the
VIDEO_STANDARD register represent the SMPTE standards as shown in
Table 4-4
.
In addition to the 5-bit video standard code word, the VIDEO_STANDARD register
also contains two status bits. The STD_LOCK bit will be set HIGH whenever the
flywheel has achieved full synchronization. The INT_PROG bit will be set HIGH if
the detected video standard is progressive and LOW if the detected video standard
is interlaced.
The VD_STD[4:0], STD_LOCK and INT_PROG bits of the VIDEO_STANDARD
register will default to zero after device reset. The VD_STD[4:0] and INT_PROG
bits will also default to zero if the SMPTE_BYPASS pin is asserted LOW or if the
LOCKED output is LOW. The STD_LOCK bit will retain its previous value if the
PCLK is removed.
Table 4-3: Host Interface Description for Raster Structure Registers
Register Name
Bit
Name
Description
R/W
Default
RASTER_STRUCTURE1
Address: 00Eh
15-12
–
Not Used.
–
–
11-0
RASTER_STRUCTURE_1[11:0]
Words Per Active Line
R
0
RASTER_STRUCTURE2
Address: 00Fh
15-12
–
Not Used.
–
–
11-0
RASTER_STRUCTURE_2[11:0]
Words Per Total Line.
R
0
RASTER_STRUCTURE3
Address: 010h
15-11
–
Not Used.
–
–
10-0
RASTER_STRUCTURE_3[10:0]
Total Lines Per Frame
R
0
RASTER_STRUCTURE4
Address: 011h
15-11
–
Not Used.
–
–
10-0
RASTER_STRUCTURE_4[10:0]
Active Lines Per Field
R
0
Table 4-4: Supported Video Standards
VD_STD[4:0]
SMPTE
Standard
Video Format
Length of
HANC
Length of
Active Video
Total
Samples
SMPTE352M
Lines
00h
296M (HD)
1280x720/60 (1:1)
358
1280
1650
13
01h
296M (HD)
1280x720/60 (1:1) - EM
198
1440
1650
13
02h
296M (HD)
1280x720/30 (1:1)
2008
1280
3300
13
03h
296M (HD)
1280x720/30 (1:1) - EM
408
2880
3300
13
04h
296M (HD)
1280x720/50 (1:1)
688
1280
1980
13
05h
296M (HD)
1280x720/50 (1:1) - EM
240
1728
1980
13
06h
296M (HD)
1280x720/25 (1:1)
2668
1280
3960
13
07h
296M (HD)
1280x720/25 (1:1) - EM
492
3456
3960
13