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參數(shù)資料
| 型號(hào)： | GS1531-CBE2 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS1531 HD-LINX-TM II Multi-Rate Serializer |
| 中文描述： | GS1531的HD - LINX進(jìn)程，商標(biāo)第二多速率串行器 |
| 文件頁數(shù)： | 22/49頁 |
| 文件大?。?/td> | 500K |
| 代理商： | GS1531-CBE2 |
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GS1531 Data Sheet
30573 - 4
July 2005
22 of 49
4. Detailed Description
4.1 Functional Overview
The GS1531 is a multi-rate serializer with an integrated cable driver. When used in
conjunction with the external GO1525 Voltage Controlled Oscillator, a transmit
solution at 1.485Gb/s, 1.485/1.001Gb/s or 270Mb/s is realized.
The device has three different modes of operation which must be set by the
application layer through external device pins.
When SMPTE mode is enabled, the device will accept 10-bit multiplexed or 20-bit
demultiplexed SMPTE compliant data at both HD and SD signal rates. The
device’s additional processing features are also enabled in this mode.
In DVB-ASI mode, the GS1531 will accept an 8-bit parallel DVB-ASI compliant
transport stream on its upper input bus. The serial output data stream will be
8b/10b encoded and stuffed.
The GS1531’s third mode allows for the serializing of data not conforming to
SMPTE or DVB-ASI streams.
The provided serial digital outputs feature a high impedance mode, output mute on
loss of parallel clock and adjustable signal swing. The output slew rate is
automatically controlled by the SD/HD setting.
In the digital signal processing core, several data processing functions are
implemented including SMPTE 352M and EDH data packet generation and
insertion, and automatic video standards detection. These features are all enabled
by default, but may be individually disabled via internal registers accessible
through the GSPI host interface.
Finally, the GS1531 contains a JTAG interface for boundary scan test
implementations.
4.2 Parallel Data Inputs
Data inputs enter the device on the rising edge of PCLK as shown in
Figure 4-1
.
The input data format is defined by the setting of the external SD/HD,
SMPTE_BYPASS and DVB_ASI pins and may be presented in 10-bit or 20-bit
format. The input data bus width is controlled independently from the internal data
bus width by the 20bit/10bit input pin.
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| GS1532 | HD-LINX II Voltage Controlled Oscillator |
| GS1560 | HD-LINX II Voltage Controlled Oscillator |
| GS9060 | HD-LINX II Voltage Controlled Oscillator |
| GS9062 | HD-LINX II Voltage Controlled Oscillator |
| GS1560ACF | GS1560A/GS1561 HD-LINX-R II Dual-Rate Deserializer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS1531CBE3 | 制造商:Gennum Corporation 功能描述:SERIALISER HD/SD/ASI W/DRIVER 100BGA |
| GS1532 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate Serializer with ClockCleaner |
| GS1532_07 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate Serializer with ClockCleaner |
| GS1532-CF | 制造商:Rochester Electronics LLC 功能描述: 制造商:Gennum Corporation 功能描述: |
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