
GL9714 PCI Express
TM
PIPE x4 PHY
2004-2007 Genesys Logic Inc. - All rights reserved.
Page 7
LIST OF TABLES
T
ABLE
3.1
-
B
ALL
O
UT
.......................................................................................................10
T
ABLE
3.2
-
N
UMERIC
P
IN
L
IST
.........................................................................................11
T
ABLE
3.3
-
A
LPHABETIC
P
IN
L
IST
...................................................................................13
T
ABLE
3.4
-
P
IN
D
ESCRIPTIONS
.........................................................................................15
T
ABLE
3.5
-
P
ARAMETER OF
B
UFFER
I/O .........................................................................17
T
ABLE
4.1
-
B
ASE
A
DDRESS FOR
R
EGISTERS
....................................................................18
T
ABLE
6.1
-
P
IN
F
UNCTIONS
..............................................................................................32
T
ABLE
7.1
-
DC
E
LECTRICAL
C
HARACTERISTICS
............................................................35
T
ABLE
7.2
-
T
RANSMIT AND
R
ECEIVE
L
ATENCY
T
IME
....................................................35
T
ABLE
7.3
–
T
RANSITION
T
IME OF
P
OWER
S
TATE
...........................................................35
T
ABLE
7.4
–
T
YPICAL
P
OWER
C
ONSUMPTION WITH
2-L
ANES
,
4-L
ANES
,
AND
1.2V
D
IFFERENTIAL
P
EAK TO
P
EAK
O
UTPUT
V
OLTAGE
..........................................................37
T
ABLE
7.5
–
T
YPICAL
P
OWER
C
ONSUMPTION WITH
S
INGLE
-L
ANE AND
1.2V
D
IFFERENTIAL
P
EAK TO
P
EAK
O
UTPUT
V
OLTAGE
..........................................................38
T
ABLE
7.6
–
T
RANSMITTER
S
ERIAL
O
UTPUT
....................................................................39
T
ABLE
7.7
–
R
ECEIVER
S
ERIAL
O
UTPUT
..........................................................................40
T
ABLE
7.8
–
T
EMPERATURE
R
ANGE
.................................................................................40
T
ABLE
7.9
–
T
HERMAL
C
HARACTERISTICS
......................................................................40
T
ABLE
8.1
–
I
NPUT
S
ETUP
,
H
OLD
T
IME AND
O
UTPUT
T
IMING FOR
8-
BIT
SDR
M
ODE
...42
T
ABLE
8.2
–
I
NPUT
S
ETUP
,
H
OLD
T
IME AND
O
UTPUT
T
IMING FOR
8-
BIT
DDR
M
ODE
..43
T
ABLE
8.3
–
I
NPUT
S
ETUP
,
H
OLD
T
IME AND
O
UTPUT
T
IMING FOR
16-
BIT
M
ODE
..........43
T
ABLE
8.4
–
I
NPUT
S
ETUP
,
H
OLD
T
IME AND
O
UTPUT
T
IMING FOR
10-
BIT
SDR
M
ODE
.43
T
ABLE
8.5
–
I
NPUT
S
ETUP
,
H
OLD
T
IME AND
O
UTPUT
T
IMING FOR
10-
BIT
DDR
M
ODE
44
T
ABLE
8.6
–
R
EFERENCE
T
IMING
I
NFORMATION
.............................................................44
T
ABLE
10.1
-
O
RDERING
I
NFORMATION
...........................................................................46