參數(shù)資料
型號: GL9714
廠商: Genesys Logic, Inc.
英文描述: PCI ExpressTM PIPE x4 PHY
中文描述: 管x4的PCI ExpressTM物理層
文件頁數(shù): 38/46頁
文件大?。?/td> 527K
代理商: GL9714
GL9714 PCI Express
TM
PIPE x4 PHY
2004-2007 Genesys Logic Inc. - All rights reserved.
Page 38
Power Consumption with Single-Lane Operation
Table 7.5 – Typical Power Consumption with Single-Lane and 1.2V Differential Peak to Peak
Output Voltage
Current at
2.5V (mA)
Current at
Analogue
1.8V (mA)
Current at
Digital 1.8V
(mA)
Current at
Reference Voltage
1.25V (mA)
Operation
Condition
Power
State
Operation Mode
Power
Consumption
(mW)
51
90
65
0
All on
P0
8-bit @250MHz
PCLK
406.5
10
72
56
0
PLL on
TX idle
RX on
P0s
8-bit @250MHz
PCLK
255.4
10
65
45
0
PLL on
TX idle
RX idle
P1
8-bit @250MHz
PCLK
223
6
37
7
0
PLL off
TX idle
RX idle
P2
8-bit @3.13MHz
PCLK
94.2
59
90
57
0
All on
P0
16-bit @125MHz
PCLK
412.1
12
71
49
0
PLL on
TX idle
RX on
P0s
16-bit @125MHz
PCLK
246
12
64
38
0
PLL on
TX idle
RX idle
P1
16-bit @1.56MHz
PCLK
213.6
6
36
6
0
PLL off
TX idle
RX idle
P2
16-bit @125MHz
PCLK
90.6
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