參數(shù)資料
型號: GL9714
廠商: Genesys Logic, Inc.
英文描述: PCI ExpressTM PIPE x4 PHY
中文描述: 管x4的PCI ExpressTM物理層
文件頁數(shù): 22/46頁
文件大?。?/td> 527K
代理商: GL9714
GL9714 PCI Express
TM
PIPE x4 PHY
2004-2007 Genesys Logic Inc. - All rights reserved.
Page 22
4.3 SMBus Protocol
GL9714 registers are programmed by System Management Bus (SMBus). Fig. 4.1 shows the SMBus
topology. The V
DD
power is 2.5V +/- 10% and the pull up resistor is 1K
. Both SMBCLK and SMBDAT
lines are bi-directional, connected to 2.5V supply voltage through a pull-up resistor. The operating frequency
is 10~100KHz and the SMBus address of GL9714 is 7’h2C.
Figure 4.1 – SMBus Topology of GL9714
SMBus uses fixed voltage levels to define the logic “ZERO” and logic “ONE” on the bus respectively. The data
on SMBDAT must be stable during the “HIGH” period of the clock. Data can change state only when SMBCLK
is low. Fig. 4.2 illustrates the relationships.
Figure 4.2 – Data Validity
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