參數(shù)資料
型號(hào)： GL843
廠商： Genesys Logic, Inc.
英文描述： High Speed USB 2.0 With ADF 2-in-1 Scanner Controller
中文描述： 高速USB 2.0同盟2合1掃描儀控制器
文件頁(yè)數(shù)： 54/84頁(yè)
文件大?。?/td> 837K
代理商： GL843
GL843 High Speed USB2.0 With ADF 2-in-1 Scanner Controller For 3x
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 54
Offset 7Bh
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. Default value = 8
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h00
CK4MAP15
CK4MAP14 CK4MAP13
CK4MAP12
CK4MAP11
CK4MAP10
CK4MAP9
CK4MAP8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0 CK4MAP[15:8]
Bits mapping setting for CCD clock 4.
Offset 7Ch
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………
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…
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………
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…
..
…
. Default value = 8
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h00
CK4MAP7
CK4MAP6 CK4MAP5
CK4MAP4
CK4MAP3
CK4MAP2
CK4MAP1
CK4MAP0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0 CK4MAP[7:0]
Bits mapping setting for CCD clock 4.
Offset 7Dh
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………
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…
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…
. Default value = 8
’
h00
CK1NEG
R/W
CK3NEG
R/W
CK4NEG
R/W
RSNEG
R/W
CPNEG
R/W
BSMPNEG VSMPNEG DLYSET
R/W
R/W
R/W
7 CK1NEG
6 CK3NEG
5 CK4NEG
4 RSNEG
3 CPNEG
2 BSMPNEG
1 VSMPNEG
0 DLYSE
T
0
CCD clock1,clock2 output are synchronized with rising edge of system clock.
1
CCD clock1 & clock2 output are synchronized with falling edge of system clock.
0 CCD clock3 output is synchronized with rising edge of system clock.
1 CCD clock3 output is synchronized with falling edge of system clock.
0 CCD clock4 output is synchronized with rising edge of system clock.
1 CCD clock4 output is synchronized with falling edge of system clock.
0 CCD RS output is synchronized with rising edge of system clock.
1 RS output is synchronized with falling edge of system clock.
0 CCD CP output is synchronized with rising edge of system clock.
1 CCD CP output is synchronized with falling edge of system clock.
0 AFE video sample output is synchronized with rising edge of system clock.
1 AFE video sample output is synchronized with falling edge of system clock.
0 AFE dark sample output is synchronized with rising edge of system clock.
1 AFE dark sample output is synchronized with falling edge of system clock.
0 The function is disabled.
1
To enable VSMP and BSMP to delay output by 8.33ns unit. Please refer to Reg 7F.
Offset 7Eh
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..
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…………
..
…
.
………
..
…
..
…
. Default value = 8
’
h00
GPOLED25 GPOLED24 GPOLED23 GPOLED22 GPOLED21 GPOLED10 GPOLED9 GPOLED8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7 GPOLED25
6 GPOLED24
5 GPOLED23
4 GPOLED22
3 GPOLED21
0 Set GPIO25 as general purpose I/O.
1 Set GPIO25 as LED output.
0 Set GPIO24 as general purpose I/O.
1 Set GPIO24 as LED output.
0 Set GPIO23 as general purpose I/O.
1 Set GPIO23 as LED output.
0 Set GPIO22 as general purpose I/O.
1 Set GPIO22 as LED output.
0 Set GPIO21 as general purpose I/O.
1 Set GPIO21 as LED output.
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GL848 制造商:GENESYS 制造商全稱(chēng):GENESYS 功能描述:High Speed USB 2.0
GL850 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:USB 2.0 4-PORT HUB Controller
GL850A 制造商:GENESYS 制造商全稱(chēng):GENESYS 功能描述:USB 2.0 Low-Power HUB Controller
GL850A-MNGXX 制造商:GENESYS 制造商全稱(chēng):GENESYS 功能描述:USB 2.0 Low-Power HUB Controller
GL850A-MNNXX 制造商:GENESYS 制造商全稱(chēng):GENESYS 功能描述:USB 2.0 Low-Power HUB Controller
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