
GL843 High Speed USB2.0 With ADF 2-in-1 Scanner Controller For 3x
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 32
Offset 1Dh
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. Default value = 8
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h04
CK4LOW
R/W
CK3LOW
R/W
CK1LOW TGSHLD4 TGSHLD3 TGSHLD2 TGSHLD1 TGSHLD0
R/W
R/W
R/W
R/W
R/W
R/W
7 CK4LOW
6 CK3LOW
5 CK1LOW
4-0 TGSHLD[4:0]
CCD TG shoulder width (in pixel time). Please refer to Reg34.
Note: Designers have to program the TGSHLD >= 2 (more than two).
0 Clock 4 will be high when TG goes high.
1 Clock 4 will be low when TG goes high.
0 Clock 3 will be high when TG goes high.
1 Clock 3 will be low when TG goes high.
0 Clock 1 & 2 will be high when TG goes high.
1 Clock 1 & 2 will be low when TG goes high.
Offset 1Eh
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. Default value = 8
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h20
WDTIME3 WDTIME2 WDTIME1 WDTIME0 LINESEL3 LINESEL2 LINESEL1 LINESEL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-4 WDTIME[3:0]
To set watch-dog time.
3-0 LINESEL[3:0]
To set vertical resolution for CIS or dummy lines for CCD.
CIS : LINESEL = 0 full resolution.
The unit is 30 seconds.
= 1 1/2 resolution.
= 2 1/3 resolution .
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= 15 1/16 resolution.
CCD : LINESEL = 0 no dummy line.
= 1 1 dummy line.
= 2 2 dummy lines.
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= 15 15 dummy lines.
Note: In contrary to dummy line feature in CCD, for low resolution in CIS, the
scanning speed is improved by implementing fast motor moving.
Offset 1Fh
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. Default value = 8
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h00
SCANFED7 SCANFED6 SCANFED5 SCANFED4 SCANFED3 SCANFED2 SCANFED1 SCANFED0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0
SCANFED[7:0]
Steps number setting for moving to scanning position.
Please refer to description of Reg6A
Note: 1.it cannot be programmed to logic zero.
2.it can be multiplied by2*
STEPTIM
Offset 20h
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. Default value = 8
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h00
BUFSEL7 BUFSEL6 BUFSEL5 BUFSEL4 BUFSEL3 BUFSEL2 BUFSEL1 BUFSEL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0 BUFSEL[7:0]
To set buffer condition.
When buffer is full, scanner will stop and wait for host to read out image data
from SDRAM.
The valid data count (has not been read) is represented by VALIDWORD (in word).