
GL843 High Speed USB2.0 With ADF 2-in-1 Scanner Controller For 3x
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 45
Offset 59h
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. Default value = 8
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h00
BSMP4
R/W
BSMP3
R/W
BSMP2
R/W
BSMP1
R/W
BSMP0
R/W
BSMPW2
R/W
BSMPW1
R/W
BSMPW0
R/W
7-3 BSMP[4:0]
2-0 BSMPW[2:0]
(1). Color, gray or line-art : 12 clocks (phase)/pixel mode
5 6 7 8 9 10 11 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3 4
AFE BSMP
Reg59=52H : BSMP[4:0]=10H BSMPW[2:0]=2H
Note: 16 clocks (phase)/pixel and 18 clocks(phase)/pixel modes are similar to 12
clocks(phase)/pixel mode.
Rising edge position of dark voltage sampling for AFE.
Pulse width of dark voltage sampling.
Offset 5Ah
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. Default value = 8
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h00
ADCLKINV
RLCSEL
R/W
CDSREF1 CDSREF0
R/W
RLC3
R/W
RLC2
R/W
RLC1
R/W
RLC0
R/W
R/W
R/W
7 ADCLKINV
6 RLCSEL
5-4 CDSREF[1:0]
3-0 RLC[3:0]
0 ADC clock in not reversed.
1 ADC clock is reversed.
0 Do not select.
1 Select reset level clamp on a pixel-by-pixel basis.
Front-end CDS reference for line rate scanning type.
Front-end RLC for line rate scanning type.
Offset 5Bh
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. Default value = 8
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h00
X
X
MTRTBL
GMMADDR13 GMMADDR12 GMMADDR11 GMMADDR10
GMMADDR9 GMMADDR8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7 RESERVED
6 MTRTBL
5-0
GMMADDR[13:8]
Start address for downloading gamma or motor tables (in word)
-
0 To write gamma tables address by GMMADDR[12:0]
1 To write motor tables address by GMMADDR[12:0]
Offset 5Ch
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. Default value = 8
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h00
GMMADDR7
GMMADDR6
GMMADDR5
GMMADDR4
GMMADDR3
GMMADDR2
GMMADDR1 GMMADDR0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0
GMMADDR[7:0
]
Start address for downloading gamma or motor tables (in word)
Offset 5Dh
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. Default value = 8
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h00
HISPD7
R/W
HISPD6
R/W
HISPD5
R/W
HISPD4
R/W
HISPD3
R/W
HISPD2
R/W
HISPD1
R/W
HISPD0
R/W