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參數(shù)資料
| 型號： | GF9330 |
| 英文描述： | GF9330 - High Performance HDTV/SDTV Deinterlacer |
| 中文描述： | GF9330 -高性能高清/標清去隔行掃描 |
| 文件頁數(shù)： | 20/34頁 |
| 文件大小： | 550K |
| 代理商： | GF9330 |
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GENNUM CORPORATION
18283 - 3
20
G
6
MODE_32
UC
Selects the internal 3:2 sequence detection
when set to 0, otherwise uses external
sequence from the input pins, XSEQ[3:0].
0
7
CC_BLANK_EN
UC
Enables blanking in the close captioned video
region.
0
10:8
CL_RND[2:0]
UC
Defines the clipping and rounding output
format as shown below:
000: 12-bit output with 10.2 (.25 lsb)
resolution
001: 10-bit output clipped/rounded from 0 to
1023
010: 10-bit output clipped/rounded from 4-
1019
011: 10-bit output Y clipped/rounded from 64
to
940, Cr/Cb clipped/rounded from 64 to
960
100: Reserved
101: 8-bit output clipped/rounded from 0 to
255
110: 8-bit output rounded/clipped from 1 to
254
111: 8-bit output Y clipped/rounded from 16 to
235, Cr/Cb clipped/rounded from 16 to
240
000
11
CROP_EN
UC
Enables output video cropping based on
CROP_V_CROP_SIZE,
CROP_V_FRAME_SIZE,
CROP_H_CROP_SIZE and
CROP_H_LINE_SIZE parameters.
0
12
FVH_EN_BIT
UC
Enables the GF9330 to use external FVH
control in place of embedded TRS.
0
13
F_POLARITY
UC
Defines the polarity of the F_IN pin. When set
to '1', F follows normal convention where F_IN
is '0' for field 1(odd) and '1' for field 2 (even).
1
14
V_POLARITY
UC
Defines the polarity of the V_IN pin. When set
to '1', V_IN follows normal convention where
V_IN is '1' in the vertical blanking region.
1
15
H_POLARITY
UC
Defines the polarity of the H_IN pin. When set
to '1', H_IN follows normal convention where H
is '1' in the horizontal blanking region.
1
2
7:0
F_OFFSET_EVEN[7:0]
UC
D
efines the number of lines from the F_IN pin
EAV transition to the vertical blanking interval
following the even field. This parameter has a
maximum value of 255.
00000000
15:8
F_OFFSET_ODD[7:0]
UC
Defines the number of lines from the F_IN pin
EAV transition to the vertical blanking interval
following the odd field. This parameter has a
maximum value of 255.
00000000
CONTROL REGISTER DEFINITIONS
(Continued)
ADDRESS
BIT
LOCATION
REGISTER NAME
DESCRIPTION
DEFAULT
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| GF9330-CBP | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:High Performance HDTV/SDTV Deinterlacer |
| GF9331 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GF9331 - HDTV/SDTV Motion Co-processor |
| GF9331-CBP | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:DTV/SDTV Motion Co-processor |
| GF9351A-CBE2 | 制造商:Sigma Designs 功能描述:IC IMAGE PROCESSOR 10BIT DUAL |
| GF9410\5B | 功能描述:MOSFET N-Channel 30V 2A RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
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