參數(shù)資料
型號(hào): FT2232C
廠商: Electronic Theatre Controls, Inc.
英文描述: FT2232C Dual USB UART / FIFO I.C.
中文描述: FT2232C雙USB的UART / FIFO的集成電路
文件頁數(shù): 6/51頁
文件大小: 907K
代理商: FT2232C
DS2232C Version 1.4
Future Technology Devices International Ltd. 2005 Page 6 of 54
FT2232C Dual USB UART / FIFO I.C.
x8 Clock
Multiplier
Serial Interface
Engine
( SIE )
USB
Protocol Engine
Dual Port RX
Buffer
384 Bytes
Dual Port TX
Buffer
128 bytes
3.3 Volt
LDO
Regulator
USB
Transceiver
USB DPLL
6MHZ
Oscillator
48MHz
12MHz
XTIN
XTOUT
USBDP
USBDM
3V3OUT
VCC
PWREN#
PWRCTL
EEPROM
Interface
EECS
EESK
EEDATA
Dual Port RX
Buffer
384 Bytes
Dual Port TX
Buffer
128 bytes
ADBUS0
ADBUS1
ADBUS2
ADBUS3
ADBUS4
ADBUS5
ADBUS6
ADBUS7
ACBUS0
ACBUS1
ACBUS2
ACBUS3
BDBUS0
BDBUS1
BDBUS2
BDBUS3
BDBUS4
BDBUS5
BDBUS6
BDBUS7
BCBUS0
BCBUS1
BCBUS2
BCBUS3
TEST
GND
Multi-
Purpose
UART / FIFO
Controller
Multi-
Purpose
UART / FIFO
Controller
Baud Rate
Generator
48MHz
Baud Rate
Generator
48MHz
RESET#
RESET
GENERATOR
RSTOUT#
3V3OUT
SI/WUA
SI/WUB
Channel A
Channel B
3.0 Simplified Block Diagram
3.1 Functional Block Descriptions
3.3V LDO Regulator
The 3.3V LDO Regulator generates the 3.3 volt
reference voltage for driving the USB transceiver
cell output buffers. It requires an external
decoupling capacitor to be attached to the 3V3OUT
regulator output pin. It also provides 3.3V power to
the RSTOUT# pin. The main function of this block
is to power the USB Transceiver and the Reset
Generator Cells rather than to power external logic.
However, external circuitry requiring 3.3V nominal
at a current of not greater than 5mA could also
draw its power from the 3V3OUT pin if required.
USB Transceiver
The USB Transceiver Cell provides the USB 1.1 /
USB 2.0 full-speed physical interface to the USB
cable. The output drivers provide 3.3 volt level slew
rate control signalling, whilst a differential receiver
and two single ended receivers provide USB data
in, SEO and USB Reset condition detection.
USB DPLL
The USB DPLL cell locks on to the incoming NRZI
USB data and provides separate recovered clock
and data signals to the SIE block.
Figure 1 - FT2232C Simplified Block Diagram
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