參數(shù)資料
型號(hào): FT2232C
廠商: Electronic Theatre Controls, Inc.
英文描述: FT2232C Dual USB UART / FIFO I.C.
中文描述: FT2232C雙USB的UART / FIFO的集成電路
文件頁(yè)數(shù): 33/51頁(yè)
文件大?。?/td> 907K
代理商: FT2232C
DS2232C Version 1.4
Future Technology Devices International Ltd. 2005 Page 33 of 54
FT2232C Dual USB UART / FIFO I.C.
9.3 245 FIFO Interface Mode Signal Descriptions and Configuration
When either Channel A or Channel B are in 245 FIFO mode the IO signal lines are configured as follows.
FIFO DATA BUS GROUP **Note 17
Pin#
Signal
Type
Description
Channel A
24
23
22
21
20
19
17
16
Channel B
40
39
38
37
36
35
33
32
D0
D1
D2
D3
D4
D5
D6
D7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
FIFO Data Bus Bit 0
FIFO Data Bus Bit 1
FIFO Data Bus Bit 2
FIFO Data Bus Bit 3
FIFO Data Bus Bit 4
FIFO Data Bus Bit 5
FIFO Data Bus Bit 6
FIFO Data Bus Bit 7
FIFO CONTROL INTERFACE GROUP
Pin#
Signal
Type
Description
Channel A
15
Channel B
30
RXF#
OUTPUT When high, do not read data from the FIFO. When low, there is
data available in the FIFO which can be read by strobing RD#
low then high again
**
Note 18
OUTPUT When high, do not write data into the FIFO. When low, data can
be written into the FIFO by strobing WR high then low.
**
Note 18
INPUT
Enables Current FIFO Data Byte on D0..D7 when low. Fetches
the next FIFO Data Byte (if available) from the Receive FIFO
Buffer when RD# goes from low to high.
**
Note 17
INPUT
Writes the Data Byte on the D0..D7 into the Transmit FIFO Buffer
when WR goes from high to low.
**
Note 17
INPUT
The Send Immediate / WakeUp signal combines two functions
on a single pin. If USB is in suspend mode (PWREN# = 1) and
remote wakeup is enabled in the EEPROM , strobing this pin
low will cause the device to request a resume on the USB Bus.
Normally, this can be used to wake up the Host PC.
During normal operation (PWREN# = 0), if this pin is strobed low
any data in the device TX buffer will be sent out over USB on the
next Bulk-IN request from the drivers regardless of the pending
packet size. This can be used to optimise USB transfer speed for
some applications. Tie this pin to VCCIO if not used.
13
29
TXE#
12
28
RD#
11
27
WR
10
26
SI/WU
**Note 17 :
I
n Input Mode, these pins are pulled to VCCIO via internal 200K resistors. These can be programmed to
gently pull low during USB suspend ( PWREN# = “1” ) by setting this option in the EEPROM.
**Note 18 :
During device reset, these pins are tri-state but pulled up to VCCIO via internal 200K resistors.
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