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參數(shù)資料
| 型號(hào)： | FT2232C |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | FT2232C Dual USB UART / FIFO I.C. |
| 中文描述： | FT2232C雙USB的UART / FIFO的集成電路 |
| 文件頁數(shù)： | 10/51頁 |
| 文件大?。?/td> | 907K |
| 代理商： | FT2232C |
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DS2232C Version 1.4
Future Technology Devices International Ltd. 2005 Page 10 of 54
FT2232C Dual USB UART / FIFO I.C.
5.0 Pin Definitions
This section decribes the operation of the FT2232C pins. Common pins are defined in the first section, then the I/O
pins are defined, by chip mode. More detailed descriptions of the operation of the I/O pins are provided in section 9.
5.1 Common Pins
The operation of the following FT2232C pins stay the same, regardless of the chip mode :-
USB INTERFACE GROUP
Pin#
Signal
7
USBDP
8
USBDM
Type
I/O
I/O
Description
USB Data Signal Plus ( Requires 1.5K pull-up to 3V3OUT or RSTOUT# )
USB Data Signal Minus
EEPROM INTERFACE GROUP
Pin#
Signal
48
EECS
1
EESK
2
EEDATA
Type
I/O
OUTPUT Clock signal to EEPROM. Tri-State during device reset, else drives out.
**Note 1
I/O
EEPROM – Data I/O Connect directly to Data-In of the EEPROM and to Data-
Out of the EEPROM via a 2.2K resistor. Also, pull Data-Out of the EEPROM
to VCC via a 10K resistor for correct operation. Tri-State during device reset.
**Note 1
Description
EEPROM – Chip Select. Tri-State during device reset.
**Note 1
MISCELLANEOUS SIGNAL GROUP
Pin#
Signal
4
RESET#
Type
INPUT
Description
Can be used by an external device to reset the FT2232C. If not required, tie to
VCC.
**Note 1
OUTPUT Output of the internal Reset Generator. Drives low for 5.6 ms after VCC > 3.5V
and the internal clock starts up, then clamps it’s output to the 3.3V output of the
internal regulator. Taking RESET# low will also force RSTOUT# to drive low.
RSTOUT# is NOT affected by a USB Bus Reset.
INPUT
Puts device into I.C. test mode – must be tied to GND for normal operation.
OUTPUT Goes Low after the device is configured via USB, then high during USB suspend.
Can be used to control power to external logic using a P-Channel Logic Level
MOSFET switch. Enable the Interface Pull-Down Option in EEPROM when using
the PWREN# pin in this way.
INPUT
Input to 6MHz Crystal Oscillator Cell. This pin can also be driven by an external
6MHz clock if required. Note : Switching threshold of this pin is VCC/2, so if
driving from an external source, the source must be driving at 5V CMOS level or
a.c. coupled to centre around VCC/2.
OUTPUT Output from 6MHz Crystal Oscillator Cell. XTOUT stops oscillating during USB
suspend, so take care if using this signal to clock external logic.
5
RSTOUT#
47
41
TEST
PWREN#
43
XTIN
44
XTOUT
**Note 1 -
During device reset, these pins are tri-state but pulled up to VCC via internal 200K resistors.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FT2232C_04 | 制造商:FTDI 制造商全稱:FTDI 功能描述:Dual USB UART / FIFO I.C. |
| FT2232D | 制造商:Future Technology Devices International 功能描述:UART 2-CH 3.3V/5V 48-Pin LQFP 制造商:Future Technology Devices International 功能描述:UART 2-CH 3.3V/5V 48-Pin LQFP Bulk 制造商:Future Technology Devices International (FTDI Chip) 功能描述:USB Full Speed to Dual Channel Serial UART/FIFO/JTAG/SPI/I2C IC - LQFP-48 |
| FT2232D/TR | 制造商:Future Technology Devices International (FTDI Chip) 功能描述:USB-UART/FIFO SMD 2232 LQFP48 制造商:Future Technology Devices International (FTDI Chip) 功能描述:USB-UART/FIFO, SMD, 2232, LQFP48 制造商:Future Technology Devices International (FTDI Chip) 功能描述:USB-UART/FIFO, SMD, 2232, LQFP48; USB Type:FIFO; USB Version:2.0; Supply Voltage Min:3V; Supply Voltage Max:5.25V; Digital IC Case Style:LQFP; No. of Pins:48; Data Rate:12Mbps; No. of Ports:2; Operating Temperature Min:-40C ;RoHS Compliant: Yes |
| FT2232D-REEL | 功能描述:USB 接口集成電路 USB to Dual UART/ FIFO/SPI/JTAG/I2C RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| FT2232D-TRAY | 制造商:Future Technology Devices International (FTDI Chip) 功能描述:DUAL USB TO SERIAL UART/FIFO IC |
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