參數(shù)資料
型號(hào): FDS6685
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 小信號(hào)晶體管
英文描述: P-Channel Logic Level PowerTrenchTM MOSFET
中文描述: 8800 mA, 30 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: SO-8
文件頁數(shù): 2/8頁
文件大小: 204K
代理商: FDS6685
F
FDS6685 Rev. B
Electrical Characteristics
T
A
= 25
°
C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
BV
DSS
T
J
Coefficient
I
DSS
Zero Gate Voltage Drain Current
I
GSSF
Gate-Body Leakage Current, Forward
I
GSSR
Gate-Body Leakage Current, Reverse
V
GS
= 0 V, I
D
= -250
μ
A
I
D
= -250
μ
A,Referenced to 25
°
C
-30
V
Breakdown Voltage Temperature
-24
mV/
°
C
V
DS
= -24 V, V
GS
= 0 V
V
GS
= 25 V, V
DS
= 0 V
V
GS
= -25 V, V
DS
= 0 V
-1
100
-100
μ
A
nA
nA
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
GS(th)
T
J
Temperature Coefficient
R
DS(on)
Static Drain-Source
On-Resistance
V
DS
= V
GS
, I
D
= -250
μ
A
I
D
= -250
μ
A,Referenced to 25
°
C
-1
-2
5
-3
V
Gate Threshold Voltage
mV/
°
C
V
GS
= -10 V, I
D
= -8.8 A
V
GS
= -10 V, I
D
= -8.8 A,T
J
=125
°
C
V
GS
= -4.5 V, I
D
= -6.7 A
V
GS
= -10 V, V
DS
= -5 V
V
DS
= -10 V, I
D
= -8.8 A
0.015
0.023
0.026
0.020
0.032
0.035
I
D(on)
g
FS
On-State Drain Current
Forward Transconductance
-25
A
S
20
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
1680
545
220
pF
pF
pF
V
= -15 V, V
GS
= 0 V,
f = 1.0 MHz
Switching Characteristics
(Note 2)
t
d(on)
Turn-On Delay Time
t
r
Turn-On Rise Time
t
d(off)
Turn-Off Delay Time
t
f
Turn-Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate-Source Charge
Q
gd
Gate-Drain Charge
12
15
55
23
19
6.8
7.2
22
27
90
37
27
ns
ns
ns
ns
nC
nC
nC
V
DD
= -15 V, I
D
= -1 A,
V
GS
= -10 V, R
GEN
= 6
V
DS
= -10 V, I
D
= -8.8 A,
V
GS
= -5 V,
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
V
SD
Drain-Source Diode Forward Voltage
-2.1
-1.2
A
V
V
GS
= 0 V, I
S
= -2.1 A
(Note 2)
-0.52
Notes:
1:
R
θ
JA
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. R
θ
JC
is guaranteed by design while R
θ
JA
is determined by the user's board design.
Scale 1 : 1 on letter size paper
2:
Pulse Test: Pulse Width
300
μ
s, Duty Cycle
2.0%
a) 50
°
C/W when
mounted on a 1 in
2
pad of 2 oz. copper.
b) 105
°
C/W when
mounted on a 0.04 in
2
pad of 2 oz. copper.
c) 125
°
C/W on a minimum
mounting pad of 2 oz. copper.
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參數(shù)描述
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