2001 Fairchild Semiconductor Corporation
FDS2572 Rev. B, October 2001
F
Thermal Resistance vs. Mounting Pad Area
The maximum rated junction temperature, T
JM
, and the
thermal resistance of the heat dissipating path
determines the maximum allowable device power
dissipation, P
DM
, in an application. Therefore the
application’s ambient temperature, T
A
(
o
C), and thermal
resistance R
θ
JA
(
o
C/W) must be reviewed to ensure that
T
JM
is never exceeded. Equation 1 mathematically
represents the relationship and serves as the basis for
establishing the rating of the part.
(
)
θ
JA
In using surface mount devices such as the SO8
package, the environment in which it is applied will have
a significant influence on the part’s current and maximum
power dissipation ratings. Precise determination of P
DM
is complex and influenced by many factors:
1. Mounting pad area onto which the device is attached
and whether there is copper on one side or both sides
of the board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the
part, the board and the environment they are in.
Fairchild provides thermal information to assist the
designer’s preliminary application evaluation. Figure 19
defines the R
θ
JA
for the device as a function of the top
copper (component side) area. This is for a horizontally
positioned FR-4 board with 1oz copper after 1000
seconds of steady state power with no air flow. This
graph provides the necessary information for calculation
of the steady state junction temperature or power
dissipation. Pulse applications can be evaluated using
the Fairchild device Spice thermal model or manually
utilizing the normalized maximum transient thermal
impedance curve.
Thermal resistances corresponding to other copper
areas can be obtained from Figure 19 or by calculation
using Equation 2. The area, in square inches is the top
copper area including the gate and source pads.
The transient thermal impedance (Z
θ
JA
) is also effected
by varied top copper board area. Figure 20 shows the
effect of copper pad area on single pulse transient
thermal impedance. Each trace represents a copper pad
area in square inches corresponding to the descending
list in the graph. Spice and SABER thermal models are
provided for each of the listed pad areas.
Copper pad area has no perceivable effect on transient
thermal impedance for pulse widths less than 100ms.
For pulse widths less than 100ms the transient thermal
impedance is determined by the die and package.
Therefore,
CTHERM1
through
RTHERM1 through RTHERM5 remain constant for each
of the thermal models. A listing of the model component
values is available in Table 1.
CTHERM5
and
(EQ. 1)
PDM
-----------------------------
–
=
(EQ. 2)
R
θ
JA
64
+
0.23
Area
------------26
+
=
Figure 19. Thermal Resistance vs Mounting
Pad Area
100
150
200
0.001
0.01
AREA, TOP COPPER AREA (in
2
)
0.1
1
10
50
R
θ
JA
= 64 + 26/(0.23+Area)
θ
J
(
o
C
Figure 20. Thermal Impedance vs Mounting Pad Area
30
60
90
120
150
0
10
-1
10
0
10
1
10
2
10
3
t, RECTANGULAR PULSE DURATION (s)
Z
θ
J
,
COPPER BOARD AREA - DESCENDING ORDER
0.04 in
0.28 in
2
0.52 in
2
0.76 in
2
1.00 in
2
I
o
C