參數(shù)資料
型號: FDMJ1023PZ
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 小信號晶體管
英文描述: Dual P-Channel PowerTrench㈢ MOSFET
中文描述: 2.9 mA, 20 V, 2 CHANNEL, P-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: ROHS COMPLIANT, SC-75, MICROFET-6
文件頁數(shù): 2/7頁
文件大小: 257K
代理商: FDMJ1023PZ
F
2007 Fairchild Semiconductor Corporation
FDMJ1023PZ Rev.B
www.fairchildsemi.com
2
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
BV
DSS
T
J
I
DSS
I
GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I
D
= –250
μ
A, V
GS
= 0V
–20
V
I
D
= –250
μ
A, referenced to 25°C
–13
mV
C
V
DS
= –16V, V
GS
= 0V
V
GS
= ±8V, V
DS
= 0V
–1
±10
μ
A
μ
A
On Characteristics
V
GS(th)
V
GS(th)
T
J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V
GS
= V
DS
, I
D
= –250
μ
A
–0.4
–0.7
–1.0
V
I
D
= –250
μ
A, referenced to 25°C
2.3
mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= –4.5V, I
D
= –2.9A
V
GS
= –2.5V, I
D
= –2.4A
V
GS
= –1.8V, I
D
= –2.1A
V
GS
= –1.5V, I
D
= –1.0A
V
GS
= –4.5V, I
D
= –2.9A ,T
J
= 125°C
V
DD
= –5V, I
D
= –2.9A
93
128
173
217
130
7
112
160
210
300
160
m
g
FS
Forward Transconductance
S
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
V
DS
= –10V, V
GS
= 0V,
f = 1MHz
300
55
45
400
75
70
pF
pF
pF
Switching Characteristics
t
d(on)
Turn-On Delay Time
t
r
Rise Time
t
d(off)
Turn-Off Delay Time
t
f
Fall Time
Q
g
Total Gate Charge
Q
gs
Gate to Source Charge
Q
gd
Gate to Drain “Miller” Charge
V
DD
= –10V, I
D
= –2.9A
V
GS
= –4.5V, R
GEN
= 6
5
4
10
10
37
22
6.5
ns
ns
ns
ns
nC
nC
nC
23
12
4.6
0.6
1.0
V
DD
= –5V, I
D
= –2.9A
V
GS
= –4.5V
Drain-Source Diode Characteristics
I
S
Maximum Continuous Drain-Source Diode Forward Current
V
SD
Source to Drain Diode Forward Voltage
t
rr
Reverse Recovery Time
Q
rr
Reverse Recovery Charge
Notes:
1. R
is determined with the device mounted on a 1in
2
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θ
JC
is
guaranteed by design while R
θ
JA
is determined by
the user's board design.
–1.1
–1.2
45
27
A
V
ns
nC
V
GS
= 0V, I
S
= –1.1A
–0.9
28
15
I
F
= –2.9A, di/dt = 100A/
μ
s
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
a. 89°C/W when mounted on a
1 in
pad of 2 oz copper
b.182°C/W when mounted on a
minimum pad of 2 oz copper
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