參數(shù)資料
型號: FDMA530PZ
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: Single P-Channel PowerTrench MOSFET -30V, -6.8A, 35mohm
中文描述: 6.8 A, 30 V, 0.065 ohm, P-CHANNEL, Si, POWER, MOSFET
封裝: ROHS COMPLIANT, 6 PIN
文件頁數(shù): 2/6頁
文件大?。?/td> 236K
代理商: FDMA530PZ
F
M
FDMA530PZ Rev.B
www.fairchildsemi.com
2
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Δ
BV
DSS
Δ
T
J
I
DSS
I
GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I
D
= –250
μ
A, V
GS
= 0V
–30
V
I
D
= –250
μ
A, referenced to 25°C
–23
mV/°
C
V
DS
= –24V, V
GS
= 0V
V
GS
= ±25V, V
DS
= 0V
-1
±10
μ
A
μ
A
On Characteristics
V
GS(th)
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V
GS
= V
DS
, I
D
= –250
μ
A
–1
–2.1
–3
V
I
D
= –250
μ
A, referenced to 25°C
5.4
mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= –10V, I
D
= –6.8A
V
GS
= –4.5V, I
D
= –5.0A
V
GS
= –10V, I
D
= –6.8A ,T
J
= 125°C
V
DS
= –10V, I
D
= –6.8A
30
52
43
17
35
6
5
63
m
Ω
g
FS
Forward Transconductance
S
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
V
DS
= –15V, V
GS
= 0V,
f = 1MHz
805
155
130
1070
210
195
pF
pF
pF
Switching Characteristics
t
d(on)
Turn-On Delay Time
t
r
Rise Time
t
d(off)
Turn-Off Delay Time
t
f
Fall Time
Q
g
Total Gate Charge
Q
g
Total Gate Charge
Q
gs
Gate to Source Gate Charge
Q
gd
Gate to Drain “Miller” Charge
V
DD
= –15V, I
D
= –6.8A
V
GS
= –10V, R
GEN
= 6
Ω
6
12
34
69
50
24
11
ns
ns
ns
ns
nC
nC
nC
nC
21
43
31
16
9
3.1
4.5
V
GS
= –10V
V
GS
= –5V
V
DD
= –15V
I
D
= –6.8A
Drain-Source Diode Characteristics
I
S
Maximum Continuous Drain-Source Diode Forward Current
V
SD
Source to Drain Diode Forward Voltage
t
rr
Reverse Recovery Time
Q
rr
Reverse Recovery Charge
–2
–1.2
36
29
A
V
ns
nC
V
GS
= 0V, I
S
= –2A
–0.8
24
19
I
F
= –6.8A, di/dt = 100A/
μ
s
Notes:
1:
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
2:
Pulse Test: Pulse Width < 30
0
μ
s, Duty cycle < 2.0%.
3:
The diode connected between the gate and the source serves only as protection against ESD. No gate overvoltage rating is implied.
a. 52°C/W when mounted on
a 1 in
pad of 2 oz copper
b.145°C/W when mounted on a
minimum pad of 2 oz copper
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