參數(shù)資料
型號(hào)： FDD5202P
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： JFETs
英文描述： P-Channel, Logic Level, MOSFET
中文描述： 8 A, 60 V, 0.3 ohm, P-CHANNEL, Si, POWER, MOSFET, TO-252
封裝： DPAK-3
文件頁數(shù)： 4/5頁
文件大?。?/td> 59K
代理商： FDD5202P
F
FDD5202P, Rev. A
Typical Characteristics
(continued)
Figure 7. Gate-Charge Characteristics.
Figure 8. Capacitance Characteristics.
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient themal response will change depending on the circuit board design.
0.0001
0.001
0.01
0.1
t , TIME (sec)
1
10
100
300
0.0001
0.001
0.01
0.1
1
T
Single Pulse
D = 0.5
0.1
0.05
0.02
0.01
0.2
r
Duty Cycle, D = t / t
2
R (t) = r(t) * R
R =
96°C/W
JA
T - T = P * R JA
P(pk)
t
1
t
2
0
20
40
60
0.01
0.1
1
10
100
1000
SINGLE PULSE TIME (SEC)
P
SINGLE PULSE
R
θ
JA
= 96
o
C/W
T
A
= 25
o
C
0
2
4
6
8
10
0
4
8
12
16
20
Q
g
, GATE CHARGE (nC)
-
G
,
I
D
= -2.3A
V
DS
= -10V
-30V
-20V
0.01
0.1
1
10
100
0.1
1
10
100
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
-
D
,
R
DS(ON)
LIMIT
V
GS
= 10V
SINGLE PULSE
R
θ
JA
= 96
o
C/W
T
A
= 25
o
C
DC
10S
1S
100ms
10ms
1ms
0
100
200
300
400
500
600
700
800
900
0
10
20
30
40
50
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C
C
ISS
C
RSS
C
OSS
f = 1MHz
V
GS
= 0 V
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