參數(shù)資料
型號(hào)： FDD4141
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi)： JFETs
英文描述： Zener Diode; Application: General; Pd (mW): 400; Vz (V): 3.5 to 3.7; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: MHD
中文描述： 50 A, 40 V, 0.0187 ohm, P-CHANNEL, Si, POWER, MOSFET, TO-252AA
封裝： ROHS COMPLIANT, TO-252, D-PAK-3
文件頁(yè)數(shù)： 2/6頁(yè)
文件大?。?/td> 244K
代理商： FDD4141
F
www.fairchildsemi.com
2
2007 Fairchild Semiconductor Corporation
FDD4141 Rev.C
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
BV
DSS
T
J
I
DSS
I
GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I
D
= -250
μ
A, V
GS
= 0V
-40
V
I
D
= -250
μ
A, referenced to 25°C
-29
mV
/
°C
V
DS
= -32V, V
GS
= 0V
V
GS
= ±20V, V
DS
= 0V
-1
μ
A
nA
±100
On Characteristics
V
GS(th)
V
GS(th)
T
J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V
GS
= V
DS
, I
D
= -250
μ
A
-1
-1.8
-3
V
I
D
= -250
μ
A, referenced to 25°C
5.8
mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= -10V, I
D
= -12.7A
V
GS
= -4.5V, I
D
= -10.4A
V
GS
= -10V, I
D
= -12.7A,
T
J
= 125°C
V
DS
= -5V, I
D
= -12.7A
10.1
14.5
12.3
18.0
m
15.3
18.7
g
FS
Forward Transconductance
38
S
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
g
Gate Resistance
V
DS
= -20V, V
GS
= 0V,
f = 1MHz
2085
360
210
4.6
2775
480
310
pF
pF
pF
f = 1MHz
Switching Characteristics
t
d(on)
Turn-On Delay Time
t
r
Rise Time
t
d(off)
Turn-Off Delay Time
t
f
Fall Time
Q
g
Total Gate Charge
Q
g
Total Gate Charge
Q
gs
Gate to Source Charge
Q
gd
Gate to Drain “Miller” Charge
V
DD
= -20V, I
D
= -12.7A,
V
GS
= -10V, R
GEN
= 6
10
7
38
15
36
19
7
8
19
13
60
27
50
27
ns
ns
ns
ns
nC
nC
nC
nC
V
GS
= 0V to -10V
V
GS
= 0V to -5V
V
DD
= -20V,
I
D
= -12.7A
Drain-Source Diode Characteristics
V
SD
Source to Drain Diode Forward Voltage
t
rr
Reverse Recovery Time
Q
rr
Reverse Recovery Charge
V
GS
= 0V, I
S
= -12.7A (Note 2)
-0.8
29
26
-1.2
44
40
V
ns
nC
I
F
= -12.7A, di/dt = 100A/
μ
s
Notes
:
1:
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R
θ
JC
is guaranteed by design while R
θ
JA
is determined by the user’s board design.
2:
Pulse Test: Pulse Width < 30
0
μ
s, Duty cycle < 2.0%.
3:
Starting
T
J
=
25
°
C
,
L
= 3mH
,
I
AS
= 15A
,
V
DD
= 40V
,
V
GS
= 10V.
52°C/W when mounted on a
1 in
pad of 2 oz copper
100°C/W when mounted
on a minimum pad.
a)
b)
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