
Altera Corporation
1–79
July 2009
Stratix II Device Handbook, Volume 2
PLLs in Stratix II and Stratix II GX Devices
RCLK10
v
RCLK11
v
RCLK12
v
RCLK13
v
RCLK14
v
RCLK15
vv
RCLK16
vv
v
RCLK17
v
RCLK18
v
RCLK19
v
RCLK20
v
RCLK21
vv
v
RCLK22
v
RCLK23
v
RCLK24
v
RCLK25
v
RCLK26
v
RCLK27
v
RCLK28
v
RCLK29
vv
RCLK30
v
RCLK31
v
External Clock Output
PLL5_OUT[3..0]p/
n
v
PLL6_OUT[3..0]p/
n
v
Table 1–23. Stratix II Global and Regional Clock Outputs From PLLs
(Part 2 of 3)
Clock Network
PLL Number and Type
EP2S15 through EP2S30 Devices
EP2S60 through EP2S180 Devices
Fast PLLs
Enhanced
PLLs
Fast PLLs
Enhanced
PLLs
1234
56789
10
11
12