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參數(shù)資料
| 型號： | CY28510 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時鐘和緩沖器 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 93K |
| 代理商： | CY28510 |
CY28510
Document #: 38-07542 Rev. **
Page 7 of 13
Dial-a-Frequency Operation
VCO Frequency = (14.318180 MHz) x (N/ M)
Output1 = VCO/4 = 66.669 MHz
Output2 = VCO/8 = 33.335 MHz
To operate the Dial-a-Frequency feature, you must select the
individual output that is to be modified by selecting the Spread
spectrum control enable bit in the Clock Spread Enable
Registers to multiplex the SS PLL as the input source, which
is the only PLL that can have the “N” register value changed.
Then you must disable spread spectrum by setting MSTRSRD
in the Clock Spread Spectrum Control Register (Byte 2, bit 2)
to 0 so that the spread PLL is not being modulated. It is then
possible to change the N value from it’s default value of 149 to
any value within ±25%.
You must also set the DAFEN bit to a
1 in Byte 6, bit 0 to enable the Dial-a-Frequency feature.
Please note that the long-term or accumulated jitter will be
about 3nsec, which does not affect the operation of the device
since only Cycle-to-Cycle jitter can cause system problems.
Crystal Recommendations
The CY28510 requires a
Parallel Resonance Crystal.
Substituting a series resonance crystal will cause the
CY28510 to operate at the wrong frequency and violate the
ppm specification. For most applications there is a 300-ppm
frequency shift between series and parallel crystals due to
incorrect loading. See
Table 6
.
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, the total capacitance
the crystal will see must be considered to calculate the appro-
priate capacitive loading (CL). The following diagram shows a
typical crystal configuration using the two trim capacitors. An
important clarification for the following discussion is that the
trim capacitors are in series with the crystal not parallel. It’s a
common misconception that load capacitors are in parallel
with the crystal and should be approximately equal to the load
capacitance of the crystal.
Byte 7: Dial-a-Frequency
Control Register N [default = 66.669 MHz, N = 149d, M = 8d]
Bit
7
6
5
4
3
2
1
0
@Pup
1
0
0
1
0
1
0
1
Description
N7, MSB
N6
N5
N4
N3
N2
N1
N0, LSB
Table 6. Crystal Recommendations
Frequency
(Fund)
14.31818 MHz
Cut
AT
Loading
Parallel
Load
Cap
20 pF
Drive
(max.)
0.1 mW
Shunt
Cap
(max.)
5 pF
Motional
(max.)
0.016 pF
Tolerance
(max.)
50 ppm
Stability
(max.)
50 ppm
Aging
(max.)
5 ppm
Figure 1. Crystal Capacitive Clarification
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY28510OC | 制造商:Rochester Electronics LLC 功能描述:PERIPHERAL I/O CLOCK GENERATOR - Bulk |
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| CY28512ZC-2 | 制造商:Cypress Semiconductor 功能描述: |
| CY28512ZC-2T | 制造商:Cypress Semiconductor 功能描述: |
| CY28514 WAF | 制造商:Cypress Semiconductor 功能描述: |
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