參數(shù)資料
型號(hào)： CY28510
英文描述： Clocks and Buffers
中文描述： 時(shí)鐘和緩沖器
文件頁(yè)數(shù)： 2/13頁(yè)
文件大?。?/td> 93K
代理商： CY28510
CY28510
Document #: 38-07542 Rev. **
Page 2 of 13
Pin Description
Pin
Name
Type
Power
Description
2
REF
O
VDDX
Reference Clock: 3.3V 14.318-MHz clock output.
6
XIN
I
VDDX
Crystal Connection or External Reference Frequency Input: This pin has
dual functions. It can be used as an external 14.318-MHz crystal
connection or as an external reference frequency input.
7
XOUT
O
VDDX
Crystal Connection for an external 14.318-MHz crystal output.
I
2
C address selection.
ADDSEL1, ADSEL0: 0,0 = D0; 0,1 = D2, 1,0 = D4, 1,1 = D6
9
ADDSEL0
I, PU
250 K
VDDC
10
ADDSEL1
I, PU
250 K
VDDC
12
CLK_STOP#
I, PU
250 K
VDDC
Synchronous clock stop pin. When low, all of the clocks except REF are
stopped low after completing a normal positive pulse cycle.
I
2
C compatible SCLOCK.
I
2
C compatible SDATA.
13
SCLK
I
VDDC
14
SDATA
I/O
VDDC
3
GFS0
I, PD
250 K
VDDC
Group frequency select 0. 0 = 33 MHz, 1 = 66 MHz.
15
GFS1
I, PD
250 K
VDDC
Group frequency select 1. 0 = 33 MHz, 1 = 66 MHz.
16
GFS2
I, PD
250 K
VDDC
Group frequency select 2. 0 = 33 MHz, 1 = 66 MHz.
1
GFS3
I, PD
250 K
VDDC
Group frequency select 3. 0 = 33 MHz, 1 = 66 MHz.
17
OE
I, PU
250 K
VDDC
Output enable. 1 = enabled, 0 = disabled (tri-state)
18
CLKG3
O
VSSQ3
Output clock, group 3, 33 or 66 MHz.
22,23
CLKG2_(1:0)
O
VSSQ2
Output clocks, group 2, 33 or 66 MHz.
28,29,32,33
CLKG1_(3:0)
O
VSSQ1
Output clocks, group 1, 33 or 66 MHz.
36,37,38,40,4
1,44,46,47
CLKG0_(7:0)
O
VSSQ0
Output clocks, group 0, 33 or 66 MHz.
39
VDDQ0_2
PWR
3.3V Power supply for outputs CLKG0_(7:6).
43
VDDQ0_1
PWR
3.3V Power supply for outputs CLKG0_(5:3).
48
VDDQ0_0
PWR
3.3V Power supply for outputs CLKG0_(2:0).
35
VSSQ0
GND
Ground for output buffers CLKG0_(7:6).
42
VSSQ0
GND
Ground for output buffers CLKG0_(5:3).
45
VSSQ0
GND
Ground for output buffers CLKG0_(2:0).
30
VDDQ1
PWR
3.3V Power supply for outputs CLKG1_(3:2).
37
VSSQ1
GND
Ground for output buffers CLKG1_(3:2).
34
VDDQ1
PWR
3.3V Power supply for outputs CLKG1_(1:0).
31
VSSQ1
GND
Ground for output buffers CLKG1_(1:0).
24
VDDQ2
PWR
3.3V Power supply for outputs CLKG2_(1:0).
21
VSSQ2
GND
Ground for output buffers.
19
VDDQ3
PWR
3.3V Power supply for outputs.
20
VSSQ3
GND
Ground for output buffers.
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