參數(shù)資料
型號(hào): CY28510
英文描述: Clocks and Buffers
中文描述: 時(shí)鐘和緩沖器
文件頁(yè)數(shù): 11/13頁(yè)
文件大?。?/td> 93K
代理商: CY28510
CY28510
Document #: 38-07542 Rev. **
Page 11 of 13
AC Electrical Specifications
Parameter
Description
Condition
66 MHz
Unit
Min.
Typ.
Max.
CLK
F
VCO
T
DC
T
RISE
/T
FALL
T
GSKEW1
VCO Frequency Range
Measured at 1.5V
200
333
MHz
CLK Duty Cycle
Measured at 1.5V
45
55
%
CLK Rise and Fall Times
Measured from 0.4V to 2.4V
0.5
3.0
ns
Any CLK to Any CLK Clock Skew
within a Group
Measured at 1.5V, with Spread
Spectrum disabled.
150
ps
T
GSKEW2
Any CLK to Any CLK Clock Skew
within any Group
Measured at 1.5V, with Spread
Spectrum disabled.
150
ps
T
CCJ1
CLK Cycle-to-Cycle Jitter
Measured at 1.5V and all CLKs
running the same frequency with
Spread Spectrum disabled.
150
ps
T
CCJ2
CLK Cycle-to-Cycle Jitter
Measured at 1.5V and all CLKs
running the same frequency with
Spread Spectrum enabled
200
ps
T
CCJ3
CLK Cycle-to-Cycle Jitter
Measured at 1.5V with CLKs
running different frequencies but
the same frequency within a
Group and Sub-group and
Spread Spectrum disabled
200
ps
T
CCJ4
CLK Cycle-to-Cycle Jitter
Measured at 1.5V with CLKs
running different frequencies
including within a Sub-group and
Spread Spectrum disabled
400
ps
T
CCJ5
CLK Cycle-to-Cycle Jitter
Measured at 1.5V with CLKs
running different frequencies
including within a Sub-group and
Spread Spectrum enabled
600
ps
SCLK
T
I2C
REF
I
2
C Clock Period
Measured at 1.5V
1.0
us
Xin
XIN being driven by an external
clock source
10
18
MHz
T
DC
T
RISE
/T
FALL
REF Duty Cycle
Measured at 1.5V, See
Figure 3
45
55
%
REF Rise and Fall times
Measured from 0.4V to 2.4V, See
Figure 3
1
4
ns
T
CCJ
T
XS
REF Cycle-to-Cycle Jitter
Measured at 1.5V, See
Figure 3
450
1000
ps
Power-on Hold Off
Outputs will be as shown in
Figure 3
1.2
ms
Table 7. Signal Loading Table
Clock Name
CLK
REF
Max Load (pF)
22
15
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