參數(shù)資料
型號(hào): CS8420-CSZ
廠商: Cirrus Logic Inc
文件頁數(shù): 77/94頁
文件大?。?/td> 0K
描述: IC SAMPLE RATE CONVERTER 28SOIC
標(biāo)準(zhǔn)包裝: 27
類型: 采樣率轉(zhuǎn)換器
應(yīng)用: CD-R,DAT,DVD,MD,VTR
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC
包裝: 管件
產(chǎn)品目錄頁面: 759 (CN2011-ZH PDF)
配用: 598-1782-ND - EVALUATION BOARD FOR CS8420
其它名稱: 598-1125-5
DS245F4
79
CS8420
The TXP pin may be used to drive TTL or CMOS gates as shown in Figure 32. This circuit may be used for
optical connectors for digital audio since they usually have TTL or CMOS compatible inputs. This circuit is
also useful when driving multiple digital audio outputs since RS422 line drivers have TTL compatible inputs.
14.2
AES3 Receiver External Components
The CS8420 AES3 receiver is designed to accept both the professional and consumer interfaces. The dig-
ital audio specifications for professional use call for a balanced receiver, using XLR connectors, with 110
Ω
±20% impedance. The XLR connector on the receiver should have female pins with a male shell. Since the
receiver has a very high input impedance, a 110
Ω resistor should be placed across the receiver terminals
to match the line impedance, as shown in Figure 33. Although transformers are not required by the AES,
they are, however, strongly recommended.
If some isolation is desired without the use of transformers, a 0.01
μF capacitor should be placed in series
with each input pin (RXP and RXN) as shown in Figure 34. However, if a transformer is not used, high
frequency energy could be coupled into the receiver, causing degradation in analog performance.
Figures 33 and 34 show an optional DC blocking capacitor (0.1
μF to 0.47 μF) in series with the cable input.
This improves the robustness of the receiver, preventing the saturation of the transformer, or any DC current
flow, if a DC voltage is present on the cable.
In the configuration of systems, it is important to avoid ground loops and DC current flowing down the shield
of the cable that could result when boxes with different ground potentials are connected. Generally, it is
good practice to ground the shield to the chassis of the transmitting unit, and connect the shield through a
capacitor to chassis ground at the receiver. However, in some cases it is advantageous to have the ground
of two boxes held to the same potential, and the cable shield might be depended upon to make that electrical
TXP
TXN
TTL or
CMOS Gate
CS8420
Figure 32. TTL/CMOS Output Circuit
1
XLR
Twisted
Pair
110
Ω
110
Ω
CS8420
RXP
RXN
*See Text
Figure 33. Professional Input Circuit
1
XLR
Twisted
Pair
110
Ω
110
Ω
CS8420
RXP
RXN
0.01 F
μ
0.01 F
μ
*See Text
Figure 34. Transformerless Professional Input Circuit
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