參數(shù)資料
型號： CS5346-CQZR
廠商： Cirrus Logic Inc
文件頁數(shù)： 11/38頁
文件大?。?/td> 0K
描述： IC ADC AUD 103DB 200KHZ 48-LQFP
標(biāo)準(zhǔn)包裝： 2,000
位數(shù)： 24
采樣率（每秒）： 200k
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 250mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 6 個單端，單極
配用： 598-1790-ND - BOARD EVAL FOR CS5346
DS861PP3
19
CS5346
5. APPLICATIONS
5.1
Recommended Power-Up Sequence
1. Hold RST low until the power supply, MCLK, and LRCK are stable. In this state, the Control Port is reset
to its default settings.
2. Bring RST high. The device will remain in a low power state with the PDN bit set by default. The control
port will be accessible.
3. The desired register settings can be loaded while the PDN bit remains set.
4. Clear the PDN bit to initiate the power-up sequence.
5.2
System Clocking
The CS5346 will operate at sa mpling frequencies from 8 kHz to 200 kHz. This range is div ided into three
speed modes as shown in Table 1.
5.2.1
Master Clock
MCLK/LRCK must maintain an integer ratio as shown in Table 2. The LRCK frequency is equal to Fs, the
frequency at which audio samples for each channel are clocked out of the device. The FM bits (See “Func-
page 30.) configure the device to generate the proper clocks in Master Mode and receive the proper
clocks in Slave Mode. Table 2 illustrates several standard audio sample rates and the required MCLK and
LRCK frequencies.
Mode
Sampling Frequency
Single-Speed
8-50 kHz
Double-Speed
50-100 kHz
Quad-Speed
100-200 kHz
Table 1. Speed Modes
LRCK
(kHz)
MCLK (MHz)
* 64x
* 96x
128x
192x
256x
384x
512x
768x
1024x
32
-
---
8.1920
12.2880
16.3840
24.5760
32.7680
44.1
-
---
11.2896
16.9344
22.5792
33.8680
45.1584
48
-
---
12.2880
18.4320
24.5760
36.8640
49.1520
64
-
8.1920
12.2880
16.3840
24.5760
32.7680
-
88.2
-
11.2896
16.9344
22.5792
33.8680
45.1584
-
96
-
12.2880
18.4320
24.5760
36.8640
49.1520
-
128
8.1920
12.2880
16.3840
24.5760
32.7680
-
176.4
11.2896
16.9344
22.5792
33.8680
45.1584
-
192
12.2880
18.4320
24.5760
36.8640
49.1520
-
Mode
QSM
DSM
SSM
* Only available in master mode.
Table 2. Common Clock Frequencies
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