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參數(shù)資料
| 型號： | CS1311 |
| 文件頁數(shù)： | 22/25頁 |
| 文件大小： | 542K |
| 代理商： | CS1311 |
www.national.com
22
Revision 2.2
G
Signal Definitions
(Continued)
2.3
Outputs always drive to a level determined by the 3.3V I/O
voltage, with the exception of Open Drain mode outputs.
REFERENCE VOLTAGES
VREF_PERIPH and VREF_PCI determine input voltage
clamping, not input signal thresholds or output levels.
VREF_PCI
Determined Mode
VREF_PERIPH
Determined Mode
SDRAMInterface
(3.3V Mode)
Inputs
(3.3V Mode)
Output Only
Pins
PCI_AD00
PCI_AD01
PCI_AD02
PCI_AD03
PCI_AD04
PCI_AD05
PCI_AD06
PCI_AD07
PCI_AD08
PCI_AD09
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_CLK
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
PCI_PAR
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_IDSEL
PCI_DEVSEL#
PCI_REQ#
PCI_GNT#
PCI_PERR#
PCI_SERR#
PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_INTD#
TRI_RESET#
TRI_USERIRQ
TRI_TIMER_CLK
JTAG_TDI
JTAG_TDO
JTAG_TCK
JTAG_TMS
VI_CKL
VI_DVALID
VI_DATA0
VI_DATA1
VI_DATA2
VI_DATA3
VI_DATA4
VI_DATA5
VI_DATA6
VI_DATA7
VI_DATA8
VI_DATA9
IIC_SDA
IIC_SCL
VO_IO1
VO_IO2
VO_CLK
AI_SCK
AI_SD
AI_WS
AO_SCK
AO_WS
MM_CLK0
MM_CLK1
MM_A00
MM_A01
MM_A02
MM_A03
MM_A04
MM_A05
MM_A06
MM_A07
MM_A08
MM_A09
MM_A10
MM_A11
MM_A12
MM_A13
MM_DQ00
MM_DQ01
MM_DQ02
MM_DQ03
MM_DQ04
MM_DQ05
MM_DQ06
MM_DQ07
MM_DQ08
MM_DQ09
MM_DQ10
MM_DQ11
MM_DQ12
MM_DQM0
MM_DQM1
MM_DQM2
MM_DQM3
MM_DQ13
MM_DQ14
MM_DQ15
MM_DQ16
MM_DQ17
MM_DQ18
MM_DQ19
MM_DQ20
MM_DQ21
MM_DQ22
MM_DQ23
MM_DQ24
MM_DQ25
MM_DQ26
MM_DQ27
MM_DQ28
MM_DQ29
MM_DQ30
MM_DQ31
MM_CKE0
MM_CKE1
MM_CS0#
MM_CS1#
MM_CS2#
MM_CS3#
MM_RAS#
MM_CAS#
MM_WE#
TRI_CLKIN
BOOT_CLK
TESTMODE
SCANCPU
VO_DATA0
VO_DATA1
VO_DATA2
VO_DATA3
VO_DATA4
VO_DATA5
VO_DATA6
VO_DATA7
AO_OSCLK
AO_SCK
AO_SD1
AO_SD2
AO_SD3
AO_SD4
SPDO
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