- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366900 > CS1311 PDF資料下載
參數(shù)資料
| 型號： | CS1311 |
| 文件頁數(shù)： | 19/25頁 |
| 文件大?。?/td> | 542K |
| 代理商： | CS1311 |
Revision 2.2
19
www.national.com
G
Signal Definitions
(Continued)
2.2.7
Audio Out Interface Signals
Signal Name
Ball
No.
Type
Description
AO_OSCLK
B14
O
Over-Sampling Clock
. This output can be programmed to emit any fre-
quency up to 40 MHz, with a sub-Hertz resolution. It is intended for use
as the 256 or 384 f
s
over-sampling clock by the external D/A conversion
subsystem. A board-level 27 to 33
series resistor is recommended to
reduce ringing.
AO_SCK
A14
I/O
Serial Clock
. When the Audio Out (AO) module is programmed to act as
the serial interface timing slave (power-up default), AO_SCK acts as an
input. It receives the Serial Clock from the external audio D/A sub-
system. The clock is treated as fully asynchronous to the
CS1301/CS1311 main clock.
When the AO module is programmed to act as the serial interface timing
master, AO_SCK acts as an output. It drives the serial clock for the
external audio D/A subsystem. The clock frequency is a programmable
integral divisor of the AO_OSCLK frequency. AO_SCK is limited to 22
MHz. The sample rate of valid samples embedded within the serial
stream is variable. If used as an output, a board-level 27 to 33
series
resistor is recommended to reduce ringing.
AO_SD1
B13
O
Serial Data Buses
. Serial data to external stereo audio D/A subsystem.
The timing of transitions on this output is determined by the
CLOCK_EDGE bit in the AO_SERIAL register, and can be on positive or
negative AO_SCK edges.
AO_SD2
A13
AO_SD3
C12
AO_SD4
B12
AO_WS
A15
I/O
Word-Select or Frame synchronization
. Signal from/to the external
D/A subsystem. Each audio channel receives 1 sample for every WS
period.
When the AO module is programmed as the serial interface timing slave
(power-up default), AO_WS acts as an input. AO_WS is sampled on the
opposite AO_SCK edge from which AO_SDx are asserted.
When the AO module is programmed as serial interface timing master,
AO_WS acts as an output. AO_WS is asserted on the same AO_SCK
edge as AO_SDx.
Note:
The AO module always acts as sender, but can be master or slave for D/A timing.
2.2.8
S/PDIF Interface Signals
Signal Name
Ball
No.
Type
Description
SPDO
A12
O
S/PDIF Data Out.
Self-clocking serial data stream as per IEC958, with
1937 extensions. Note that the low impedance output buffer requires a
27 to 33
series terminator close to CS1301/CS1311 in order to match
the board trace impedance. This series terminator must be part of the
voltage divider needed to create the coaxial output through the AC isola-
tion transformer.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CS142 | Phase Control Thyristors |
| CS1501-7R | 100 Watt DC-DC Converters |
| CS1001-7R | 100 Watt DC-DC Converters |
| CS1301-7R | 100 Watt DC-DC Converters |
| CS1601-7R | IC DRIVER SER/PAR I/O 8BIT DIP18 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS1329 | 制造商:Abbatron/HH Smith 功能描述:FEDD-THRU, CS1329 |
| CS1329-000 | 制造商:TE Connectivity 功能描述:MT-LWA-NO.415-X-SP-CS7670 - Cable Rools/Shrink Tubing |
| CS13-3 | 制造商:Datak Corporation 功能描述: |
| CS1331.B0-998010 | 功能描述:IC ETH MAC GB FRAMER 1020-UPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:2,450 系列:- 控制器類型:SPI 總線至 I²C 總線橋接 接口:I²C，串行，SPI 電源電壓:2.4 V ~ 3.6 V 電流 - 電源:11mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-HVQFN（4x4） 包裝:托盤 配用:568-3511-ND - DEMO BOARD SPI TO I2C 其它名稱:935286452157SC18IS600IBSSC18IS600IBS-ND |
| CS1332-000 | 功能描述:55PC0211-24-96 制造商:te connectivity aerospace, defense and marine 系列:* 零件狀態(tài):有效 標(biāo)準(zhǔn)包裝:1 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。