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| 型號(hào)： | COP942CT |
| 文件頁數(shù)： | 15/36頁 |
| 文件大?。?/td> | 479K |
| 代理商： | COP942CT |
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MICROWIRE/PLUS
(Continued)
The CNTRL register is used to configure and control the
MICROWIRE/PLUS mode. To use the MICROWIRE/PLUS,
the MSEL bit in the CNTRL register is set to one. The SK
clock rate is selected by the two bits, S0 and S1, in the
CNTRL register. Table 3 details the different clock rates that
may be selected.
TABLE 3.
S1
0
0
1
S0
0
1
x
SK Cycle Time
2t
C
4t
C
8t
C
where,
t
C
is the instruction cycle time.
MICROWIRE/PLUS OPERATION
Setting the BUSY bit in the PSW register causes the
MICROWIRE/PLUS arrangement to start shifting the data. It
gets reset when eight data bits have been shifted. The user
may reset the BUSY bit by software to allow
<
8 bits to shift.
The device may enter the MICROWIRE/PLUS mode either
as a Master or as a Slave. Figure 6 shows how two devices
and several peripherals may be interconnected using the
MICROWIRE/PLUS arrangement.
MASTER MICROWIRE/PLUS OPERATION
In the MICROWIRE/PLUS Master mode of operation the
shift clock (SK) is generated internally by the device. The
MICROWIRE/PLUS Master always initiates all data ex-
changes. (See Figure 6). The MSEL bit in the CNTRL regis-
ter must be set to enable the SO and SK functions on the G
Port. The SO and SK pins must also be selected as outputs
by setting appropriate bits in the Port G configuration regis-
ter. Table 4 summarizes the bit settings required for Master
mode of operation.
SLAVE MICROWIRE/PLUS OPERATION
In the MICROWIRE/PLUS Slave mode of operation the SK
clock is generated by an external source. Setting the MSEL
bit in the CNTRL register enables the SO and SK functions
on the G Port. The SK pin must be selected as an input and
the SO pin selected as an output pin by appropriately setting
up the Port G configuration register. Table 4 summarizes the
settings required to enter the Slave mode of operation.
The user must set the BUSY flag immediately upon entering
the Slave mode. This will ensure that all data bits sent by the
Master will be shifted properly. After eight clock pulses the
BUSY flag will be cleared and the sequence may be re-
peated. (See Figure 6)
DS012851-16
FIGURE 5. MICROWIRE/PLUS Block Diagram
DS012851-17
FIGURE 6. MICROWIRE/PLUS Application
C
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