參數(shù)資料
型號： ATMEGA1284-PU
廠商： Atmel
文件頁數(shù)： 102/160頁
文件大?。?/td> 0K
描述： IC MCU AVR 128K FLASH 40PDIP
產(chǎn)品培訓模塊： MCU Product Line Introduction
megaAVR Introduction
標準包裝： 10
系列： AVR® ATmega
核心處理器： AVR
芯體尺寸： 8-位
速度： 20MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 128KB（64K x 16）
程序存儲器類型： 閃存
EEPROM 大小： 4K x 8
RAM 容量： 16K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 40-DIP（0.600"，15.24mm）
包裝： 管件
配用： ATSTK600-RC05-ND - STK600 ROUTING CARD AVR
46
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
10.11.5
Watchdog Timer
If the Watchdog Timer is not needed in the application, the module should be turned off. If the
Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence, always consume
power. In the deeper sleep modes, this will contribute significantly to the total current consump-
tion. Refer to ”Watchdog Timer” on page 55 for details on how to configure the Watchdog Timer.
10.11.6
Port Pins
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important is then to ensure that no pins drive resistive loads. In sleep modes where both
the I/O clock (clk
I/O) and the ADC clock (clkADC) are stopped, the input buffers of the device will
be disabled. This ensures that no power is consumed by the input logic when not needed. In
some cases, the input logic is needed for detecting wake-up conditions, and it will then be
enabled. Refer to the section ”Digital Input Enable and Sleep Modes” on page 76 for details on
which pins are enabled. If the input buffer is enabled and the input signal is left floating or have
an analog signal level close to V
CC/2, the input buffer will use excessive power.
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
CC/2 on an input pin can cause significant current even in active mode. Digital
input buffers can be disabled by writing to the Digital Input Disable Registers (DIDR1 and
10.11.7
On-chip Debug System
If the On-chip debug system is enabled by the OCDEN Fuse and the chip enters sleep mode,
the main clock source is enabled, and hence, always consumes power. In the deeper sleep
modes, this will contribute significantly to the total current consumption.
There are three alternative ways to disable the OCD system:
Disable the OCDEN Fuse
Disable the JTAGEN Fuse
Write one to the JTD bit in MCUCR
相關(guān)PDF資料
PDF描述
VE-B2M-IY-F3 CONVERTER MOD DC/DC 10V 50W
VE-B2M-IY-F2 CONVERTER MOD DC/DC 10V 50W
ATMEGA3250V-8AU IC AVR MCU 32K 8MHZ 100TQFP
ATMEGA3250-16AU IC AVR MCU 32K 16MHZ 100TQFP
VE-B2L-IY-F3 CONVERTER MOD DC/DC 28V 50W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ATMEGA1284P-XPLD 功能描述:開發(fā)板和工具包 - AVR MEGA-1284P Xplained Evaluation kit RoHS:否 制造商:Arduino 產(chǎn)品:Evaluation Boards 工具用于評估:ATMega32U4 核心:AVR 接口類型:I2C, UART, USB 工作電源電壓:6 V to 20 V
ATMEGA1284RFR2-ZF 制造商:Atmel Corporation 功能描述:2.4GHZ 128K SOC 48PIN IND 125C TRAY - Trays 制造商:Atmel Corporation 功能描述:IC MCU 8BIT 128KB FLASH 48VQFN 制造商:Atmel Corporation 功能描述:2.4GHZ 128K SOC 48pin Ind 125C Tray
ATMEGA1284RFR2-ZFR 制造商:Atmel Corporation 功能描述:2.4GHZ 128K SOC 48 PIN IND125C T&R - Tape and Reel 制造商:Atmel Corporation 功能描述:IC MCU 8BIT 128KB FLASH 48VQFN 制造商:Atmel Corporation 功能描述:2.4GHZ 128K SOC 48 pin Ind125C T&R
ATMEGA1284RFR2-ZU 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC 48PIN TRAY - Trays 制造商:Atmel Corporation 功能描述:IC MCU 8BIT 128KB FLASH 48VQFN 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC 48pin Tray
ATMEGA1284RFR2-ZUR 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC 48PIN T&R - Tape and Reel 制造商:Atmel Corporation 功能描述:IC MCU 8BIT 128KB FLASH 48VQFN 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC 48pin T&R
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*