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參數(shù)資料
| 型號： | ATA555814M01-PP |
| 廠商： | Atmel Corp. |
| 英文描述： | 1 kbit R/W IDIC with Deterministic Anticollision |
| 中文描述： | 1千比特讀/寫的確定性防撞投資業(yè)務(wù) |
| 文件頁數(shù)： | 4/42頁 |
| 文件大?。?/td> | 557K |
| 代理商： | ATA555814M01-PP |
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4
4681C–RFID–09/05
ATA5558 [Preliminary]
Figure 2-2.
Bi-phase Timing Diagram
2.5
Binary Bit Rate Generator
The tag’s data rate is binary programmable in the configuration register to operate at any bit rate
between RF/2 and RF/64.
2 n
1
+
)
2.6
Memory Section
2.6.1
Memory Map
The physical memory is subdivided into two logical sections (see
Figure 2-3
). The first logical
memory section contains the 1024 bits of user data. The second logical memory section con-
tains 320 bits of system/configuration data. Both memories are organized in 32-bit data blocks,
each block being equipped with a single lock bit, with which the associated block can be write
protected. Command controlled programming and reading always takes place on a serial MSB
first block basis so that a block constitutes the smallest directly accessible data unit. The user
memory is further subdivided into 8 pages, each of 4 blocks in size. This provides the basis of
the page security scheme (
“Password Protection” on page 6
).
Figure 2-3.
Memory Map Structure
1
Data rate = F
RF
/8
0
NRZ data stream
Biphase coded
RF field
Bi-phase coded
Modulator signal
0
1
1
1
0
1
Data rate
-----RF
=
31
29
28
27
:
7
6
5
4
3
2
1
0
30
31
36h
37h
3Eh
3Dh
3Ch
3Bh
3Ah
39h
38h
3Fh
1Eh
1Dh
1Ch
1Bh
1Fh
00h
01h
03h
02h
04h
05h
06h
07h
L
L
L
L
L
L
L
L
L
L
Configuration
Password/Page Security
Traceability 3
Traceability 2
Traceability 1
Tag ID 3
Tag ID 2
Tag ID 1
Password - Write
Password - Read
System memory
User memory
62
61
60
59
58
57
56
55
54
63
31 30 29
0
1
2
30 29
0
1
2
31
bit position
bit position
User data block0/page0
User data block1/page0
User data block2/page0
User data block3/page0
User data block4/page1
User data block5/page1
User data block6/page1
User data block7/page1
User data block31/page7
User data block30/page7
User data block29/page7
User data block28/page7
User data block27/page6
:
L
L
L
L
L
L
L
L
L
L
L
L
L
:
L
L
Lock bits
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PDF描述 |
|---|---|
| ATA555814-PAE | 1 kbit R/W IDIC with Deterministic Anticollision |
| ATA555814-PP | 1 kbit R/W IDIC with Deterministic Anticollision |
| ATA555815-DDT | 1 kbit R/W IDIC with Deterministic Anticollision |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATA555814-PAE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:1 kbit R/W IDIC with Deterministic Anticollision |
| ATA555814-PP | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:1 kbit R/W IDIC with Deterministic Anticollision |
| ATA555815C-PP | 功能描述:外圍驅(qū)動器與原件 - PCI ATA555815C-PP Transponder RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| ATA555815-DDT | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:1 kbit R/W IDIC with Deterministic Anticollision |
| ATA555815-DDW | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:1 kbit R/W IDIC with Deterministic Anticollision |
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